MAX7360 Maxim, MAX7360 Datasheet
MAX7360
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MAX7360 Summary of contents
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... LED drive or logic control. The MAX7360 is offered in a 40-pin (5mm x 5mm) thin QFN package with an exposed pad, and a small 36-bump wafer level package (WLP) for cell phones, pocket PCs, and other portable consumer electronic applications ...
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... For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection ELECTRICAL CHARACTERISTICS (continued +1.62V to +3.6V -40NC to +85NC, unless otherwise noted. Typical values are PARAMETER SYMBOL GPIO SPECIFICATIONS Input ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection ELECTRICAL CHARACTERISTICS (continued +1.62V to +3.6V -40NC to +85NC, unless otherwise noted. Typical values are PARAMETER SYMBOL Data Hold Time ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection (V = +2.5V + unless otherwise noted GPO OUTPUT LOW VOLTAGE vs. SINK CURRENT (COL2–COL7) 250 ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection PIN NAME TQFN WLP 1 A6 ROW0 2 B6 ROW1 3 C4 ROW2 4 C6 ROW3 5, 15, 25, B4, C5, D2, GND ROW4 ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection PIN NAME TQFN WLP 24 D1 INTI Active-Low GPI Interrupt Output. INTI is open drain and requires a pullup resistor Positive Supply Voltage. Bypass V ...
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... For each key-switch output used as a GPO, the number of monitored key switches reduces by eight. On power-up, all control registers are set to power-up values and the MAX7360 is in sleep mode (Table 1). Functional Block Diagram PORT0 PORT1 ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 1. Register Address Map and Power-Up Condition ADDRESS READ/ POWER-UP CODE WRITE VALUE (hex) (hex) 0x00 Read only 0x3F 0x01 0x0A R/W 0x02 0xFF R/W 0x03 0x00 ...
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... KEY 31 KEY 39 and determines how INTK is deasserted. Write to bit D7 to put the MAX7360 into sleep mode or operating mode. Autosleep and autowake, when enabled, also change the status of D7 (see Table 8 in the Register Tables section). The debounce register sets the time for each debounce cycle, as well as setting whether the GPO ports are enabled or disabled. Bits D0– ...
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... GPIO Debounce Configuration Register (0x42) The GPIO debounce configuration register sets the amount of time a GPIO must be held for the MAX7360 to register a logic transition (see Table 16 in the Register Tables section). The GPIO debounce setting is inde- pendent of the key-switch debounce setting ...
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... Rotary Switch Count Register (0x4A) (Read Only) The MAX7360 keeps a count of the rotary switch rotations in two’s compliment format (see Table 23 in the Register Tables section). The register values wrap around as the count value switches from a positive to a negative value and back again ...
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... A master (typically a microcontroller) initiates all data transfers to DECREMENT and from the MAX7360 and generates the SCL clock that synchronizes the data transfer. The MAX7360’s SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7kI, ...
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... SCL output. Each transmission consists of a START (S) condition (Figure 3) sent by a master, followed by the MAX7360 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally, a STOP (P) condition. START and STOP Conditions Both SCL and SDA remain high when the interface is not busy ...
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... The bit following a 7-bit slave address is the R/W bit, which is low for a write command and high for a read command. The first 4 bits (MSBs) of the MAX7360 slave address are always 0111. Slave address bits A3, A2, and A1 correspond, by the matrix in Table 3, to the states of the device address input AD0, and A0 corresponds to the R/W bit ...
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... R/W bit set to zero, followed by at least 1 byte of information. The first byte of information is the command byte. The command byte determines which register of the MAX7360 written by the next byte, if received STOP condition is detected after the command byte is received, the MAX7360 takes no further action (Figure 7) beyond storing the command byte ...
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... Key-Switch Interrupt Register (0x03) and the GPIO Port Interrupts (INTI) sections for additional information regarding these two interrupts. The MAX7360 operates with a +1.62V to +3.6V power- supply voltage. Bypass the power supply to GND with a 0.1FF or higher ceramic capacitor as close as possible to the device. ...
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... C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection All of the MAX7360 pins meet the 2kV Human Body Model ESD tolerances. Key-switch inputs and GPIOs meet IEC 61000-4-2 ESD protection. The IEC test stresses consist of 10 consecutive ESD discharges per polarity, at the maximum specified level and below (per IEC 61000-4-2) ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 7. Keys FIFO Register Format (0x00) SPECIAL FUNCTION The key number indicated by D5: key event always for a key press of key ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 8. Configuration Register Format (0x01) REGISTER DESCRIPTION VALUE BIT (when 0x40 Sleep (when 0x40 (when 0x40 ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 9. Debounce Register Format (0x02) (continued) REGISTER DESCRIPTION GPO ports 7, 6, and 5 enabled GPO ports and 4 enabled GPO ports 7, 6, ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 11. Ports Register Format (0x04) REGISTER DESCRIPTION VALUE BIT D7 PORT 7 Control D6 PORT 6 Control D5 PORT 5 Control D4 PORT 4 Control D3 PORT ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 12. Autorepeat Register Format (0x05) REGISTER DESCRIPTION Autorepeat is disabled Autorepeat is enabled Key-switch autorepeat delay is 8 debounce cycles Key-switch autorepeat delay is 16 debounce cycles ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 13. Autosleep Register Format (0x06) REGISTER AUTOSLEEP REGISTER No Autosleep Autosleep for (ms) 8192 4096 2048 1024 512 256 256 Power-up default settings Table 14. GPIO Global ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 15. GPIO Control Register (0x41) REGISTER DESCRIPTION VALUE BIT D7 PORT7 D6 PORT6 D5 PORT5 D4 PORT4 D3 PORT3 D2 PORT2 D1 PORT1 D0 PORT0 Table 16. ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 17. GPIO Constant-Current Setting Register (0x43) REGISTER DESCRIPTION VALUE BIT D[7:6] Reserved D[5:2] Reserved 0000 Constant- D[1:0] current setting Table 18. GPIO Output Mode Register (0x44) REGISTER ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 19. Common PWM Register (0x45) (continued) REGISTER DESCRIPTION Common PWM ratio is 252/256 Common PWM ratio is 253/256 Common PWM ratio is 254/256 Common PWM ratio is ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 21 Timeout Flag Register (0x48) (Read Only) REGISTER DESCRIPTION VALUE BIT D[7:1] Reserved 0000000 timeout flag 2 Table 22. GPIO Input ...
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I 2 C-Interfaced Key-Switch Controller and LED Driver/GPIOs with Integrated ESD Protection Table 24. PORT0–PORT7 Individual PWM Ratio Registers (0x50 to 0x57) REGISTER DESCRIPTION Power-up default setting (port PWM ratio is 0/256) PORT PWM ratio is 1/256 PORT PWM ratio ...
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... COL7 COL6 COL4 COL3 COL2 WLP (2.67mm x 2.67mm MAX7360 EP TQFN *EP = EXPOSED PAD, CONNECT EP TO GROUND. Pin Configurations ROW0 A6 ROW1 B6 ROW3 C6 ROW4 D6 ROW6 E6 COL0 ...
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... V CC SDA SCL µC INTI INTK GND Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ +3.3V +1.8V V COL7 CC COL6 PORT0 COL5 PORT1 COL4 MAX7360 PORT2 COL3 COL2 PORT3 PORT4 COL1 PORT5 COL0 PORT6 ROW7 PORT7 ROW6 ROW5 SDA ROW4 SCL ROW3 INTI ROW2 INTK ROW1 AD0 ...
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... Electrical Characteristics Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 32 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2010 Maxim Integrated Products © ...