MAX3815CCM+TD Maxim Integrated Products, MAX3815CCM+TD Datasheet - Page 8

• Manufacturer Part Number: MAX3815CCM+TD
• Description: IC EQUALIZER VIDEO 48-TQFP
• Manufacturer: Maxim Integrated Products
• Type: Video Equalizerr

Specifications of MAX3815CCM+TD

• Applications: HDMI, DVI, Receivers
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TMDS Digital Video Equalizer for DVI/HDMI
Cables
A squelching function can be created by sending the
CLKLOS output through an inverter to the OUTON pin.
This will squelch the CML outputs whenever the clock
signal is removed. A loss-of-signal LED indicator can
be incorporated into the circuit as well (see Figure 3).
The OUTLEVEL pin is an LVTTL input that allows the
user to select between standard output amplitude
(1000mV
(500mV
the standard output signal level, and forcing this pin
low results in the reduced output signal level.
The EQCONTROL pin allows the user to control the
equalization in one of three ways: forcing the pin to
ground sets the equalizer in automatic equalization
mode, forcing the pin to V
minimum equalization, and forcing a voltage between
V
tion level applied to the input signals. See the Typical
Operating Characteristics for more information.
The PWRDWN pin allows the part to be powered down
to reduce system power consumption. Force the pin
high for normal operation. Force the pin low to power-
down the IC. When powered down, the part consumes
approximately 10mA.
Figure 4. Simplified Input Circuit Schematic
8
CC
_______________________________________________________________________________________
Output Level Control (OUTLEVEL) Input
- 1V to V
Equalizer Control (EQCONTROL) Input
RX_IN+/-
P-P
P-P
differential). Forcing this pin high results in
differential) or one-half output amplitude
CC
Power-Down ( PWRDWN ) Input
allows manual control of the equaliza-
MAX3815
50Ω
CC
V
CC
/ 2 sets the equalizer to
Interface Models
The OUTON pin is an LVTTL input. Force the pin low to
enable the outputs. Force the pin high to set a differential
zero on the outputs. When disabled, the outputs will go to
a differential zero, irrespective of the signal at the inputs.
TMDS performance is heavily dependent on cable
quality. Deterministic jitter (DJ) can be caused by dif-
ferential-to-common-mode conversion (or vice-versa)
Figure 3. Squelch Circuit
Figure 5. Simplified Output Circuit Schematic
CLKLOS
10kΩ
MAX3815
LOSS-OF-CLOCK LED
Output On ( OUTON ) Input
4.7kΩ
V
CC
Cable Selection
V
CC
200Ω
OUTON
RX_OUT+
RX_OUT-