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MAX4888B
MAX4888B | |
|---|---|
| Manufacturer Part Number | MAX4888B |
| Description | The MAX4888B/MAX4888C dual double-pole/double-throw (2 x DPDT), high-speed passive switches are ideal for switching two half-lanes of PCI Express® (PCIe) data between two possible destinations |
| Manufacturer | Maxim |
| MAX4888B datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
- We ship worldwide using main international couriers like FedEx, DHL, UPS, TNT, EMS. We can also use client's freight account. Other shipping methods can be discussed. We do best to meet your needs!
Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
PrevNext
Up to 8.0Gbps Dual Passive Switches
ELECTRICAL CHARACTERISTICS (continued)
(V
= 3.3V Q10%, T
= -40NC to +85NC
CC
A
noted.) (Note 3)
PARAMETER
SYMBOL
AC PERFORMANCE
Switch Turn-On Time
t
Switch Turn-Off Time
t
OFF_SEL
Propagation Delay
Output Skew Between Pairs
Output Skew Between Same
Pair
Differential Return Loss (Note 6)
Differential Insertion Loss
Bandwidth
S
DD12
Differential Crosstalk (Note 6)
S
Differential Off-Isolation (Note 6)
S
DD21_OFF
CONTROL INPUT
Input Logic-High
Input Logic-Low
Input Logic Hysteresis
POWER SUPPLY
Power-Supply Range
V
Supply Current
CC
Note 3: All units are 100% production tested at T
design and characterization and are not production tested.
Note 4: DR
= R
- R
ON
ON(MAX)
ON(MIN)
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog-signal range.
Note 6: Guaranteed by design; not production tested.
unless otherwise noted. Typical values are at V
,
CONDITIONS
Z
= Z
= 50I
ON_SEL
S
L
Z
= Z
= 50I, Figure 1, measured at
S
L
500MHz
Z
= Z
= 50I, Figure 2, measured at
S
L
t
PD
500MHz
Z
= Z
= 50I, Figure 2, measured at
S
L
t
SK1
500MHz
t
Z
= Z
= 50I, Figure2
SK2
S
L
0Hz < f P 2.8GHz
2.8GHz < f P 5.0GHz
S
DD11
5.0GHz < f P 8.0GHz
f > 8.0GHz
S
Table 1
DD21
/S
DD21
0Hz < f P 2.5GHz
2.5GHz < f P 5.0GHz
DDCTK
5.0GHz < f P 8.0GHz
f > 8.0GHz
0Hz < f P 2.5GHz
2.5GHz < f P 5.0GHz
5.0GHz < f P 8.0GHz
f > 8.0GHz
V
IH
V
IL
V
HYST
V
CC
I
CC
= +85NC. Limits over the operating temperature range are guaranteed by
A
.
= 3.3V, T
= +25NC, unless otherwise
CC
A
MIN
TYP
MAX
UNITS
65
ns
7
ns
43
ps
8
ps
10
ps
-14
-8
dB
-5
-1
dB
8
GHz
-30
-25
dB
-35
-35
-15
-12
dB
-12
-12
1.4
V
0.6
V
130
mV
3.0
3.6
V
1
mA
3
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