74LCXHR162245TTR STMicroelectronics, 74LCXHR162245TTR Datasheet

IC BUS TXRX 16BIT LV 48-TSSOP

74LCXHR162245TTR

Manufacturer Part Number
74LCXHR162245TTR
Description
IC BUS TXRX 16BIT LV 48-TSSOP
Manufacturer
STMicroelectronics
Series
74LCXHRr
Datasheet

Specifications of 74LCXHR162245TTR

Logic Type
Transceiver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
8
Current - Output High, Low
12mA, 12mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1071-2

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Part Number:
74LCXHR162245TTR
Manufacturer:
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DESCRIPTION
The 74LCXHR162245 is a low voltage CMOS 16
BIT BUS TRANSCEIVER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
This IC is intended for two-way asynchronous
communication between data buses; the direction
of data transmission is determined by DIR input.
The two enable inputs nG can be used to disable
the device so that the buses are effectively isolat-
ed.
Bus hold on data inputs is provided in order to
eliminate the need for external pull-up or
pull-down resistor.
All outputs, which are designed to sink up to
12mA, include 26 resistors to reduce overshoot
and undershoot.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
July 2003
PIN AND FUNCTION COMPATIBLE WITH
5V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
t
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
PCI BUS LEVELS GUARANTEED AT 12 mA
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
Retention)
BUS HOLD PROVIDED ON BOTH SIDES
74 SERIES 16245
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
PD
PLH
OH
CC
= 4.7 ns (MAX.) at V
| = I
(OPR) = 2.0V to 3.6V (1.5V Data
t
PHL
WITH 5V TOLERANT INPUTS AND OUTPUT (3-STATE)
OL
= 12mA (MIN) at V
2
MOS technology. It is ideal for low
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER
CC
= 3V
CC
= 3V
ORDER CODES
PIN CONNECTION
PACKAGE
TSSOP
74LCXHR162245
TUBE
TSSOP
74LCXHR162245TTR
T & R
1/10

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74LCXHR162245TTR Summary of contents

Page 1

... All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. July 2003 = ORDER CODES PACKAGE TSSOP PIN CONNECTION 74LCXHR162245 TSSOP TUBE T & R 74LCXHR162245TTR 1/10 ...

Page 2

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 1DIR Directional Control 1B1 to 1B8 Data Inputs/Outputs 11, 12 13, 14, 16, 17, 2B1 to 2B8 Data Inputs/Outputs ...

Page 3

ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage (DIR Bus I/O Voltage (OFF State) I/O V Bus I/O Voltage (High or Low State) (note 1) I Input Diode Current IK I ...

Page 4

DC SPECIFICATIONS Symbol Parameter V High Level Input IH Voltage V Low Level Input IL Voltage V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage I Current I Power Off Leakage off Current ...

Page 5

AC ELECTRICAL CHARACTERISTICS Symbol Parameter t t Propagation Delay PLH PHL Time t t Output Enable Time PZL PZH t t Output Disable Time PLZ PHZ t Output To Output OSLH Skew Time (note1, t OSHL 2) 1) Skew is ...

Page 6

TEST CIRCUIT PLH PHL PZL PLZ PZH PHZ equivalent (includes jig and probe capacitance 500 or equivalent ...

Page 7

WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 74LCXHR162245 7/10 ...

Page 8

DIM. MIN 0. 0.17 c 0. 0˚ PIN 1 IDENTIFICATION 1 8/10 TSSOP48 MECHANICAL DATA mm. TYP MAX. 1.2 0.15 0.9 0.27 ...

Page 9

Tape & Reel TSSOP48 MECHANICAL DATA mm. DIM. MIN 12 8.7 Bo 13.1 Ko 1.5 Po 3.9 P 11.9 TYP MAX. MIN. 330 13.2 0.504 0.795 2.362 30.4 8.9 0.343 13.3 0.516 ...

Page 10

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...

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