As a member of the SWIFT™ family of dc/dc regulators, the TPS54073 low-input voltage high-output current synchronous buck PWM converter integrates all required active components

TPS54073

Manufacturer Part NumberTPS54073
DescriptionAs a member of the SWIFT™ family of dc/dc regulators, the TPS54073 low-input voltage high-output current synchronous buck PWM converter integrates all required active components
ManufacturerTexas Instruments
TPS54073 datasheet
 


Specifications of TPS54073

Iout(max)(a)14Vin(min)(v)2.2
Vin(max)(v)4Vout(min)(v)0.9
Vout(max)(v)2.5Iq(typ)(ma)13
Switching Frequency(max)(khz)700Switch Current Limit(typ)(a)14.5
TopologyBuckOperating Temperature Range(c)-40 to 85
Pin/package28HTSSOPDuty Cycle(max)(%)90
Regulated Outputs(#)1  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Page 1/26

Download datasheet (863Kb)Embed
Next
www.ti.com
............................................................................................................................................................................................
2.2 – 4 -V, 14-A SYNCHRONOUS BUCK CONVERTER
WITH DISABLED SINKING DURING START-UP
FEATURES
1
8-mΩ MOSFET Switches for High Efficiency at
2
14.5-A Peak Output Current
Separate Low-Voltage Power Bus
Disabled Current Sinking During Start-Up
Adjustable Output Voltage Down to 0.9 V
Wide PWM Frequency: Fixed 350 kHz, 550 kHz
or Adjustable 280 kHz to 700 kHz
Synchronizable to 700 kHz
Load Protected by Peak Current Limit and
Thermal Shutdown
Integrated Solution Reduces Board Area and
Total Cost
APPLICATIONS
Low-Voltage, High-Density Distributed Power
Systems
Point of Load Regulation for High-
Performance DSPs, FPGAs, ASICs, and
Microprocessors
Broadband, Networking, and Optical
Communications Infrastructure
Power PC Series Processors
TYPICAL APPLICATION
Voltage
Input 1
PVIN
Voltage
Input 2
VIN
VBIAS
AGND
*
Optional
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SWIFT, PowerPAD are trademarks of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Typical Size
6,4 mm X 9,7 mm
DESCRIPTION
As a member of the SWIFT™family of dc/dc
regulators,
high-output
converter integrates all required active components.
Included on the substrate with the listed features are
a true, high performance, voltage error amplifier that
enables maximum performance and flexibility in
choosing the output filter L and C components; an
undervoltage-lockout circuit to prevent start-up until
the input voltage reaches 3 V; an internally or
externally set slow-start circuit to limit in-rush
currents; and a power good output useful for
processor/logic reset, fault signaling, and supply
sequencing.
For
reliable
applications, the TPS54073 is designed to only
source current during start-up.
The TPS54073 is available in a thermally enhanced
28-pin TSSOP (PWP) PowerPAD™ package, which
eliminates bulky heatsinks. TI provides evaluation
modules and the SWIFT™ designer software tool to
aid in quickly achieving high-performance power
supply designs to meet aggressive equipment
development cycles
*
*
*
Output
PH
TPS54073
BOOT
PGND
VSENSE
COMP
TPS54073
SLVS547 – FEBRUARY 2005
the
TPS54073
low-input
voltage
current
synchronous
buck
power
up
in
output
precharge
START-UP WAVEFORM
WITH 3 PRECHARGE DIODES
R = 1.5
W
L
V
= 3.3 V
I/O
V
= 1.5 V
(core)
t - Time - 5 ms/div
Copyright © 2005, Texas Instruments Incorporated
PWM

TPS54073 Summary of contents

  • Page 1

    ... For reliable applications, the TPS54073 is designed to only source current during start-up. The TPS54073 is available in a thermally enhanced 28-pin TSSOP (PWP) PowerPAD™ package, which eliminates bulky heatsinks. TI provides evaluation modules and the SWIFT™ designer software tool to aid in quickly achieving high-performance power ...

  • Page 2

    ... A –40°C to 85°C Adjustible down to 0.9 V (1) The PWP package is also available taped and reeled. Add an R suffix to the device type (i.e., TPS54073PWPR). See the application section of the data sheet for PowerPAD drawing and layout information. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) ...

  • Page 3

    ... J PVIN = 2.5 V, VIN = 3.3 V (3) RT open , SYNC ≤ 0.8 V (3) RT open , SYNC ≥ 2 180 kΩ (1% resistor to AGND 100 kΩ (1% resistor to AGND) ( kΩ (1% resistor to AGND) Product Folder Link(s): TPS54073 TPS54073 SLVS547 – FEBRUARY 2005 MIN TYP MAX UNIT 2 6 8.6 ...

  • Page 4

    ... Powered by internal LDO VSENSE = V ref (5) 10-mV overdrive SS/ENA = 0 V SS/ENA = 0.2 V, VIN = 2.7 V, PVIN = 2.5 V VSENSE falling I = 2.5 mA (sink) VIN = 3.3 V, PVIN = 2.5 V (5) VIN = 3.3 V, PVIN = 2 Output shorted (5) VIN = 3 V, PVIN = 2.5 V VIN = 3.6 V, PVIN = 2.5 V Product Folder Link(s): TPS54073 www.ti.com MIN TYP MAX 90 110 ( VBIAS 60 250 1 1 0.82 1 ...

  • Page 5

    ... TERMINAL FUNCTIONS Product Folder Link(s): TPS54073 TPS54073 SLVS547 – FEBRUARY 2005 RT SYNC SS/ENA VBIAS VIN PVIN PVIN PVIN PVIN PGND PGND PGND PGND PGND , otherwise PWRGD is low. Note that ref Submit Documentation Feedback ...

  • Page 6

    ... PVIN = 2 -40 -20 100 125 Junction Temperature - C J Figure 2. Product Folder Link(s): TPS54073 www.ti.com VBIAS AGND VIN REG VBIAS 3.0 − 4.0 V PVIN ILIM 2.2 − 4.0 V BOOT OUT PH C Adaptive Dead-Time and Control Logic VIN 8 m ...

  • Page 7

    ... 100 80 Phase 60 40 Gain 20 0 − 100 100 3.6 f − Frequency − Hz Figure 8. Product Folder Link(s): TPS54073 TPS54073 SLVS547 – FEBRUARY 2005 DEVICE POWER DISSIPATION vs OUTPUT CURRENT 4.5 4 3.5 3 2.5 2 1 ...

  • Page 8

    ... Care should be taken to minimize the loop area formed by the bypass capacitor connections, the PVIN pins, and the TPS54073 ground pins. The minimum recommended bypass capacitance is a 10- F ceramic capacitor with a X5R or X7R dielectric. The optimum placement is as close as possible to the PVIN pins, the AGND, and PGND pins ...

  • Page 9

    ... Product Folder Link(s): TPS54073 TPS54073 SLVS547 – FEBRUARY 2005 plane must provide an copper is recommended, though Additional vias beyond the 0.2090 Minimum Recommended Exposed Copper Area for PowerPAD. 5mm ...

  • Page 10

    ... PowerPAD underneath the device must be soldered to the printed-circuit board. DESIGN PROCEDURE The following design procedure is used to select component values for the TPS54073. Alternately, the SWIFT Designer Software is used to generate a complete design. The SWIFT Designer Software uses an iterative design procedure and accesses a ...

  • Page 11

    ... ESR output capacitors, K results. If designing for high output currents, the minimum current limit trip point must also be taken into consideration when choosing the output inductor. The minimum current limit trip point for the TPS54073 is 14.5 A. The maximum inductor ripple current can be calculated using I ...

  • Page 12

    ... The inductor value can be decreased if more margin in the RMS current is required. In general, inductor values for use with the TPS54073 falls in the range 3.3 H, depending on the maximum required output current. Capacitor Requirements ...

  • Page 13

    ... 0.891 OUT For any TPS54073 design, start with an R1 value of 10 kΩ 14.7 kΩ. Now, the values for the compensation components that set the poles and zeros of the compensation network can be calculated. Assuming that R1 >> than R5 and C6 >> C7, the pole and zero locations are ...

  • Page 14

    ... X7R or X5R grade dielectric for temperature stability. They should be placed as close to the device connection pins as possible. POWER GOOD The TPS54073 is provided with a power-good output pin PWRGD. This output is an open-drain output and is intended to be pulled 3.3-V logic supply. A 10-kΩ pullup works well in this application. The ...

  • Page 15

    ... V/div (PH Time = 500 ns/div 16 Figure 18. START-UP WAVEFORM WITH PRECHARGE V (SS/ENA) = 500 mV/div V = 500 mV/div Time = 5 ms/div Figure 21. Product Folder Link(s): TPS54073 TPS54073 SLVS547 – FEBRUARY 2005 Figure 12. Conditions are PVIN = 2.5 LINE REGULATION vs INPUT VOLTAGE 0.3 0.25 0 0.15 0.1 0.05 I ...

  • Page 16

    ... I - Output Current - A O Figure 26. Product Folder Link(s): TPS54073 Figure 13. Conditions are PVIN = VIN LOAD TRANSIENT RESPONSE V = 100 mV/div (ac coupled A/div Time = 250 s/div m Figure 25 Copyright © 2005, Texas Instruments Incorporated www.ti.com ...

  • Page 17

    ... VIN. The primary intended application has VIN connected to a 3.3-V bus and PVIN connected to a 2.5-V bus. The TPS54073 cannot be damaged by any sequencing of these voltages. However, the UVLO (see detailed description section) is referenced to the VIN input. Some conditions may cause undesirable operation ...

  • Page 18

    ... GROUNDING AND PowerPAD LAYOUT The TPS54073 has two internal grounds (analog and power). Inside the TPS54073, the analog ground ties to all of the noise-sensitive signals, whereas the power ground ties to the noisier power signals. The PowerPAD must be tied directly to AGND. Noise injected between the two grounds can degrade the performance of the TPS54073, particularly at higher output currents ...

  • Page 19

    ... VSENSE to approximately the same voltage as VREF. If the error amplifier output is low, the PWM latch is continually reset and the high-side FET does not turn on. The low-side FET remains on until the VSENSE voltage decreases to a range that allows the PWM comparator to change states. The TPS54073 is capable of sinking current continuously until the output reaches the regulation set-point. ...

  • Page 20

    ... PWRGD pin is high. A hysteresis voltage equal ref and a 35- s falling-edge deglitch circuit prevent tripping of the power-good comparator due to high-frequency noise. 20 Submit Documentation Feedback Product Folder Link(s): TPS54073 www.ti.com ref Copyright © 2005, Texas Instruments Incorporated ...

  • Page 21

    ... TPS54073PWP ACTIVE TPS54073PWPG4 ACTIVE TPS54073PWPR ACTIVE TPS54073PWPRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...

  • Page 22

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TPS54073PWPR HTSSOP PWP PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 (mm) Diameter Width (mm) W1 (mm) 28 2000 330.0 16.4 6.9 Pack Materials-Page 1 11-Mar-2008 B0 (mm) K0 (mm Pin1 (mm) (mm) Quadrant 10 ...

  • Page 23

    ... Device Package Type TPS54073PWPR HTSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) PWP 28 2000 Pack Materials-Page 2 11-Mar-2008 Width (mm) Height (mm) 346.0 346.0 33.0 ...

  • Page 24

    ...

  • Page 25

    ...

  • Page 26

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...