PCM1606

Manufacturer Part NumberPCM1606
ManufacturerTexas Instruments
PCM1606 datasheet
 


Specifications of PCM1606

# Dacs6# Inputs / # Outputs0 / 6
ArchitectureDelta-SigmaResolution(bits)24
Sampling Rate(max)(khz)192Control InterfaceH/W
Digital Audio InterfaceL,R,I2S,TDMThd+n(typ)(%)0.002
Dac Snr(typ)(db)103Power Consumption(typ)(mw)250
Additional FeaturesTDM SupportOperating Temperature Range(c)-25 to 85
Analog Voltage Av/dd(min)(v)4.5Analog Voltage Av/dd(max)(v)5.5
Pin/package20SSOP  
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FEATURES
D
24-Bit Resolution
D
Analog Performance:
− Dynamic Range: 103 dB, Typical
− SNR: 103 dB, Typical
− THD+N: 0.004%, Typical
− Full-Scale Output: 3.1 Vp-p, Typical
D
8× Oversampling Interpolation Filter:
− Stopband Attenuation: –55 dB
− Passband Ripple: ±0.03 dB
D
Sampling Frequency:
− 5 kHz to 200 kHz (Channels 1 and 2)
− 5 kHz to 100 kHz (Channels 3, 4, 5, and 6)
D
Accepts 16- and 24-Bit Audio Data
D
2
Data Formats: Standard, I
S, and
Left-Justified, TDM
D
System Clock: 128 f
, 192 f
, 256 f
S
S
512 f
, or 768 f
S
S
D
Digital De-Emphasis for 32 kHz, 44.1 kHz,
48 kHz
D
Power Supply: 5-V Single Supply
D
20 -Lead SSOP Package
APPLICATIONS
D
Integrated A/V Receivers
D
DVD Movie and Audio Players
D
HDTV Receivers
D
Car Audio Systems
D
DVD Add-On Cards for High-End PCs
D
Digital Audio Workstations
D
Other Multichannel Audio Systems
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SLES014B − OCTOBER 2001 − REVISED AUGUST 2002
DESCRIPTION
The PCM1606 is a CMOS monolithic integrated circuit
that
features
six
converters and support circuitry in a small 20-lead
SSOP package. The digital-to-analog converters utilize
Texas Instruments’ enhanced multilevel, delta-sigma
architecture, which employs 2
and 8-level amplitude quantization to achieve excellent
signal-to-noise performance and a high tolerance to
clock jitter.
The PCM1606 accepts industry-standard audio data
formats with 16- to 24-bit audio data. Sampling rates up
to 200 kHz are supported.
, 384 f
,
S
S
DATA1
1
DATA2
2
DATA3
3
FMT1
4
FMT0
5
6
ZEROA
AGND
7
V
5
8
OUT
V
6
9
OUT
V
1
10
OUT
www.ti.com
24-bit
audio
digital-to-analog
nd
-order noise shaping
PCM1606
(TOP VIEW)
20
SCKI
19
BCK
18
LRCK
17
DEMP1
16
DEMP0
15
V
CC
14
V
COM
13
V
4
OUT
12
V
3
OUT
11
V
2
OUT
Copyright  2002, Texas Instruments Incorporated
1

PCM1606 Summary of contents

  • Page 1

    ... Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 DESCRIPTION The PCM1606 is a CMOS monolithic integrated circuit that features six converters and support circuitry in a small 20-lead SSOP package ...

  • Page 2

    ... SSOP ZZ334-1 PCM1606E 20-Lead SSOP ZZ334-1 † Models with a slash (/) are available only in tape and reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces of PCM1606Y/2K gets a single 2000-piece tape and reel. functional block diagram BCK LRCK Serial Input ...

  • Page 3

    TERMINAL I/O I/O NAME PIN AGND 7 — Analog and digital ground BCK 19 I Shift clock input for serial audio data (see Note 2) DATA1 1 I Serial audio data input for V OUT 1 and V OUT 2 ...

  • Page 4

    ... A-weighted kHz/256 f S A-weighted 192 kHz/128 44.1 kHz/384 kHz/256 192 kHz/128 OUT = − OUT = 0 BPZ Full scale (−0 dB) Ac load www.ti.com = 44.1 kHz, S PCM1606E UNIT UNIT TYP MAX 24 Bits 5 200 kHz kHz 5 ...

  • Page 5

    ... Condition in 192-kHz operation is channel 3 through channel 6 are disabled. timing requirements system clock input The PCM1606 requires a system clock for operating the digital interpolation filters and multilevel delta-sigma modulators. The system clock is applied at the SCKI (pin 20). Table 1 shows examples of system clock frequencies for common audio sampling rates. ...

  • Page 6

    ... SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 timing requirements (continued) power-on reset functions The PCM1606 includes a power-on reset function. Figure 2 shows the operation of this function. With the system clock active and V CC initialization sequence requires 1024 system clocks from the time V PCM1606 is set to its reset default state ...

  • Page 7

    ... DATA1, DATA2, and DATA3 into the audio interface serial shift registers. Serial data is clocked into the PCM1606 on the rising edge of BCK. LRCK is the serial audio left/right word clock. LRCK is used to latch serial data into the serial audio interface internal registers. ...

  • Page 8

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 timing requirements (continued) LRCK t (BCH) BCK DATA1, DATA2, DATA3 PARAMETER t (BCY) BCK pulse cycle time t (BCH) BCK high-level time t (BCL) BCK low-level time t (BL) BCK rising edge ...

  • Page 9

    BCK t (BCKH) Bit clock pulse duration HIGH t (BCKL) Bit clock pulse duration LOW † 1/128 1/256 and 1/512 Figure 4. Bit Clock Timing for TDM Format ...

  • Page 10

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 timing requirements (continued) (1) Standard Data Format; L-Channel = HIGH, R-Channel = LOW LRCK BCK (= 16-Bit Right-Justified, BCK = ...

  • Page 11

    ... Figure 6. Audio Data Input Format (Continued) functional description The PCM1606 has several built-in functions including digital input data format selection and digital de-emphasis. These functions are hardware controlled with static control signals and used on pin FMT1 (pin 4), pin FMT0 (pin 5), pin DEMP1 (pin 17), and DEMP0 (pin 16). ...

  • Page 12

    ... The output amplifiers include an RC continuous-time filter, which helps to reduce the out-of-band noise energy present at the DAC outputs due to the noise shaping characteristics of the PCM1606’s delta-sigma D/A converters. The frequency response of this filter is shown in Figure 7. By itself, this filter is not enough to attenuate the out-of-band noise to an acceptable level for most applications ...

  • Page 13

    ... One unbuffered common-mode voltage output pin, V pin is nominally biased voltage level equal to V voltage follower is required for buffering purposes. Figure 8 shows an example of using the V biasing applications. PCM1606 Figure 8. Biasing External Circuits Using the V zero flag zero detect condition Zero detection for each output channel is independent from the others. If the data for a given channel remains level for 1024 sample periods (or LRCK clock periods), a zero detect condition exists for that channel ...

  • Page 14

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 TYPICAL CHARACTERISTICS—DIGITAL FILTER AMPLITUDE vs FREQUENCY 44.1 kHz − 25°C De-emphasis Off −40 −60 −80 −100 −120 −140 0 1 ...

  • Page 15

    TYPICAL CHARACTERISTICS—DIGITAL FILTER DE-EMPHASIS LEVEL vs FREQUENCY 0 −1 −2 −3 −4 −5 −6 −7 −8 −9 − − Frequency − kHz Figure 13 DE-EMPHASIS LEVEL vs FREQUENCY 0 −1 −2 −3 ...

  • Page 16

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 TYPICAL CHARACTERISTICS—ANALOG DYNAMIC PERFORMANCE TOTAL HARMONIC DISTORTION + NOISE vs SUPPLY VOLTAGE 100. 192 kHz 44.1 kHz 128 ...

  • Page 17

    TYPICAL CHARACTERISTICS—ANALOG DYNAMIC PERFORMANCE TOTAL HARMONIC DISTORTION + NOISE vs FREE-AIR TEMPERATURE 100. kHz 44.1 kHz 256 f S 10.00 1 44.1 kHz 384 f S 1.00 0.1 96 kHz ...

  • Page 18

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 TYPICAL CHARACTERISTICS—ANALOG DYNAMIC PERFORMANCE −90-dB OUTPUT SPECTRUM 44.1 kHz − 25°C −40 −60 −80 −100 −120 −140 −160 −180 0.0 ...

  • Page 19

    ... DATA1 SCKI 20 2 DATA2 BCK 19 3 DATA3 LRCK 18 4 FMT1 DEMP1 17 5 FMT0 DEMP0 16 PCM1606 ZEROA AGND V COM OUT 5 V OUT OUT 6 V OUT OUT 1 V OUT 2 11 Figure 28. Basic Connection Diagram www.ti.com ...

  • Page 20

    ... See the Application Information section of this data sheet for more information. power supply and grounding The PCM1606 requires a 5-V supply. The 5-V supply is used to power the DAC analog output-filter circuitry, the digital filter, and the serial interface circuitry. Two capacitors are required for supply bypassing, as shown in Figure 29. These capacitors should be located as close as possible to the PCM1606 package. The 10-µ ...

  • Page 21

    ... Because the overall system performance is defined by the quality of the D/A converters and their associated analog output circuitry, high-quality audio op amps are recommended for the active filters. Texas Instruments’ OPA2134 and OPA2353 dual op amps are shown in Figure 30 and Figure 31, and are recommended for use with the PCM1606 ...

  • Page 22

    ... SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 PCB layout guidelines A typical PCB layout for the PCM1606 is shown in Figure 32. A ground plane is recommended, with the analog and digital sections being isolated from one another using a split or cut in the circuit board. The PCM1606 should be oriented with the digital I/O pins facing the ground plane split/cut to allow for short, direct connections to the digital audio interface and control signals originating from the digital section of the board ...

  • Page 23

    ... The true rms value of the distortion and noise is referred to as THD+N. For the PCM1606 D/A converters, THD+N is measured with a full scale, 1-kHz digital sine wave as the test stimulus at the input of the DAC. The digital generator is set to 24-bit audio word length and a sampling frequency of 44 ...

  • Page 24

    ... The measurement setup for SNR is identical to that used for dynamic range, with the exception of the input signal level. (See the note provided in Figure 35). 24 APPLICATION INFORMATION Evaluation Board DEM-DAI1606 S/PDIF PCM1606 Receiver Analyzer and Display Band Limit HPF = 22 Hz † RMS Mode LPF = 22 kHz † ...

  • Page 25

    ... Results without A-Weighting will be approximately 3 dB worse. Figure 35. Test Setup for Dynamic Range and SNR Measurements SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 APPLICATION INFORMATION Evaluation Board DEM-DAI1606 S/PDIF PCM1606 Receiver Analyzer A-Weight and Filter † Display Band Limit ...

  • Page 26

    SLES014B − OCTOBER 2001 − REVISED AUGUST 2002 DB (R-PDSO-G**) 28 PINS SHOWN 0, 2,00 MAX PINS ** DIM A MAX A MIN NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to ...

  • Page 27

    ... PCM1606E ACTIVE PCM1606E/2K ACTIVE PCM1606E/2KG4 ACTIVE PCM1606EG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...

  • Page 28

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...