The PCM1681 and PCM1681-Q1 are CMOS monolithic integrated circuits which feature an eight-channel 24-bit audio digital-to-analog converter (DAC) and support circuitry in small 28-lead TSSOP PowerPAD packages

PCM1681

Manufacturer Part NumberPCM1681
DescriptionThe PCM1681 and PCM1681-Q1 are CMOS monolithic integrated circuits which feature an eight-channel 24-bit audio digital-to-analog converter (DAC) and support circuitry in small 28-lead TSSOP PowerPAD packages
ManufacturerTexas Instruments
PCM1681 datasheet
 


Specifications of PCM1681

# Dacs8# Inputs / # Outputs0 / 8
ArchitectureCurrent Segment DACResolution(bits)24
Sampling Rate(max)(khz)200Control InterfaceSPI, I2C,H/W
Digital Audio InterfaceL,R,I2S,TDM,DSPThd+n(typ)(%)0.002
Dac Snr(typ)(db)105Power Consumption(typ)(mw)386
Operating Temperature Range(c)-40 to 85Analog Voltage Av/dd(min)(v)4.5
Analog Voltage Av/dd(max)(v)5.5Pin/package28HTSSOP
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ELECTRICAL CHARACTERISTICS
All specifications at V
= 5.0 V, V
= 3.3 V, f
CC
DD
otherwise noted.
PARAMETER
RESOLUTION
DATA FORMAT
Audio data interface format
Audio data bit length
Audio data format
f
Sampling frequency
S
System clock frequency
DIGITAL INPUT/OUTPUT
Logic family
(1)
V
IH
(1)
V
IL
Input logic level
(2)
V
IH
(2)
V
IL
(1) (2)
I
IH
Input logic current
(1) (2)
I
IL
(3)
V
OH
Output logic level
(3) (4)
V
OL
(5)
DYNAMIC PERFORMANCE
THD+N
Total harmonic distortion + noise
Dynamic range
SNR
Signal-to-noise ratio
Channel separation
DC ACCURACY
Gain error
Gain mismatch,
channel-to-channel
Bipolar zero error
(1) Pins 1, 14: ZR1/ZR1/FMT0 (input mode), MSEL
(2) Pins 2, 3, 4, 5, 6, 7, 8, 11, 12, 13: MS/ADR/FMT1, MC/SCL/DEMP, MD/SDA/MUTE (input mode), SCK, DATA1, BCK, LRCK, DATA2,
DATA3, DATA4
(3) Pins 1, 28: ZR1/ZR1/FMT0 (output mode), ZR2
(4) Pin 4: MD/SDA/MUTE (output mode)
(5) Analog performance characteristics are measured using the System Two™ Cascade audio measurement system by Audio Precision™,
f
= 1 kHz, average mode, with 20-kHz LPF and 400-Hz HPF.
IN
Copyright © 2008, Texas Instruments Incorporated
= 48 kHz, system clock = 512 f
, and 24-bit data, narrow o/s mode, unless
S
S
TEST CONDITIONS
V
= V
IN
DD
V
= 0 V
IN
I
= –1 mA
OH
I
= 1 mA
OL
V
= 0 dB, f
= 48 kHz
OUT
S
V
= 0 dB, f
= 96 kHz, system clock = 256 f
OUT
S
V
= 0 dB, f
= 192 kHz,
OUT
S
system clock = 128 f
S
EIAJ, A-weighted, f
= 48 kHz
S
A-weighted, f
= 96 kHz, system clock = 256 f
S
A-weighted, f
= 192 kHz, system clock = 128 f
S
EIAJ, A-weighted, f
= 48 kHz
S
A-weighted, f
= 96 kHz, system clock = 256 f
S
A-weighted, f
= 192 kHz, system clock = 128 f
S
f
= 48 kHz
S
f
= 96 kHz, system clock = 256 f
S
S
f
= 192 kHz, system clock = 128 f
S
S
V
= 0.486 V
at BPZ input
OUT
CC
Product Folder Link(s):
PCM1681 PCM1681-Q1
PCM1681
PCM1681-Q1
SLES211B – FEBRUARY 2008 – REVISED JUNE 2008
MIN
TYP
MAX
UNIT
24
Bits
2
Right-justified, I
S,
left-justified, TDM
16-, 18-, 20-, or 24-bits,
selectable
MSB-first, 2s complement
5
200
kHz
128, 192, 256, 384,
512, 768, 1152 f
S
TTL compatible
2.0
V
DD
0.8
V
DC
2.0
5.5
0.8
10
A
–10
2.4
V
DC
0.4
0.002
0.008
0.002
S
%
0.002
100
105
105
dB
S
105
S
100
105
105
dB
S
105
S
94
102
102
dB
102
±2.0
±6
% of FSR
±2.0
±6
% of FSR
±30
±80
mV
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