The PCM1727 is a complete low cost stereo audio digital-to-analog converter (DAC) with a dual phase-locked loop (PLL) circuit included

PCM1727

Manufacturer Part NumberPCM1727
DescriptionThe PCM1727 is a complete low cost stereo audio digital-to-analog converter (DAC) with a dual phase-locked loop (PLL) circuit included
ManufacturerTexas Instruments
PCM1727 datasheet
 


Specifications of PCM1727

# Dacs2# Inputs / # Outputs0 / 2
ArchitectureDelta-SigmaResolution(bits)24
Sampling Rate(max)(khz)96Control InterfaceSPI
Digital Audio InterfaceR,I2SThd+n(typ)(%)0.0035
Dac Snr(typ)(db)92Analog Voltage Av/dd(min)(v)4.5
Analog Voltage Av/dd(max)(v)5.5Pin/package24SSOP
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DIGITAL-TO-ANALOG CONVERTER
With Programmable Dual PLL
FEATURES
ACCEPTS 16-, 20-, OR 24-BIT INPUT DATA
COMPLETE STEREO DAC: Includes Digital Filter
and Output Amp
DYNAMIC RANGE: 92dB
MULTIPLE SAMPLING FREQUENCIES:
f
= 44.1kHz, 48kHz, 96kHz
S
PROGRAMMABLE DUAL PLL CIRCUIT:
27MHz Master Clock Input
GENERATED SYSTEM CLOCK
SCKO1: 33.8688MHz
SCKO2: 384f
S
SCKO3: 768f
(44.1k/48kHz)
S
384f
(96kHz)
S
2
NORMAL OR I
S™ DATA INPUT FORMATS
SELECTABLE FUNCTIONS:
Soft Mute, Analog Output Mode
Digital Attenuator (256 Steps)
Digital De-Emphasis
+5V SINGLE POWER SUPPLY
BCKIN
Serial
LRCIN
Input
I/F
DIN
ML
MC
MD
Mode
Control
I/F
RSTB
SCKO3
SCKO2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SoundPLUS is a trademark of Texas Instruments.
2
I
S is a trademark of NXP Semiconductors.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
49%
FPO
Stereo Audio
TM
DESCRIPTION
The PCM1727 is a complete, low-cost, stereo audio digital-
to-analog converter (DAC) with a dual phase-locked loop
(PLL) circuit included. PLL-1 derives a fixed 33.8688MHz
(768f
, f
= 44.1kHz) system clock (SCKO-1), and PLL-2
S
S
derives both the 384f
clock (SCKO-2) and the 768f
(f
= 96kHz) system clock (SCKO-3) from an external
S
27MHz reference frequency. The DAC contains a 3rd-
order Delta-Sigma (
filter, and an analog output amplifier. The PCM1727 can
accept 16-, 20-, or 24-bit input data in either normal or I
formats.
The digital filter performs an 8X interpolation function and
includes selectable features such as soft mute, digital
attenuation and digital de-emphasis.
The PCM1727 is ideal for applications that combine
compressed audio and video data such as DVD, DVD
Audio with CD-DA compatibility, and karaoke DSP.
Multi-level
Delta-Sigma
DAC
Modulator
8X Oversampling
Digital Filter
with Function
Controller
Multi-level
Delta-Sigma
DAC
Modulator
BPZ-Cont.
384f
S
PLL2
Power Supply
OSC
PLL1
SCKO1
MCKO
XT1 XT2
V
PGND V
CP
www.ti.com
PCM1727
SBAS077A – JANUARY 1997 – REVISED MAY 2007
(f
= 44.1k/48k/96kHz) system
S
S
(f
= 44.1k/48kHz)/384f
S
S
) modulator, a digital interpolation
V
L
OUT
Low-pass
Filter
CAP
V
R
OUT
Low-pass
Filter
ZERO
Open Drain
AGND
V
DGND
CA
DD
Copyright © 1997-2004, Texas Instruments Incorporated
S
2
S

PCM1727 Summary of contents

  • Page 1

    ... Production processing does not necessarily include testing of all parameters. 49% FPO Stereo Audio TM DESCRIPTION The PCM1727 is a complete, low-cost, stereo audio digital- to-analog converter (DAC) with a dual phase-locked loop (PLL) circuit included. PLL-1 derives a fixed 33.8688MHz (768f , f = 44.1kHz) system clock (SCKO-1), and PLL-2 S ...

  • Page 2

    ... OUT System Clock Out 2; This output is 256f 384f system clock. S OUT System Clock Out 1; This output is 33.8688MHz system clock. — Digital Power (+5V) — Digital Ground — 27MHz Crystal. Connected to GND at external clock. PCM1727 SSOP or 384f . S S (2) (2) (2) (3) ( SBAS077A ...

  • Page 3

    ... BPZ OUT CC Full Scale (–0dB) AC Load f = 20kHz 44.1kHz S www.ti.com , unless otherwise noted. S PCM1727 MIN TYP MAX 16 2 Standard/I S Selectable 16/20/24 Selectable MSB First, 2’s Comp 44.1 96 26.73 27 27.27 33.8688 16.9344 36.8640 33.8688 36.8640 V – 0.4 DD 0.5 ...

  • Page 4

    ... 44.1k 96k (Hz) www.ti.com THD+N (0dB) vs POWER SUPPLY VOLTAGE T = 25°C, 384f 96k 44.1k S 5.0 Power Supply Voltage (V) POWER SUPPLY CURRENT vs SAMPLING RATE ( 5V 25° 48k Sampling Rate, f (Hz) S PCM1727 5 96k SBAS077A ...

  • Page 5

    ... Frequency (Hz) DE-EMPHASIS FREQUENCY RESPONSE (48kHz) 0 –2 –4 –6 –8 –10 – 10k 15k Frequency (Hz) PCM1727 SBAS077A (Cont.) 0 –0.2 –0.4 –0.6 –0.8 –1 3.1745f 4.0815f 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 20k 25k 0 0 ...

  • Page 6

    ... SCKO1 used to drive the CD-DA DSP system clock input, and SCKO3 used to drive Karaoke DSP system clock input. The standard audio signals (data, bit clock, and word clock) are generated in the decoder from the PCM1727 system clock, providing synchronization of audio and video signals. ...

  • Page 7

    ... MSB LSB www.ti.com : 10ns (min 4mA max 15ns (min 700 A max IL IL MCKO 27MHz Internal Master Clock XT1 R XT2 PCM1727 EXTERNAL CLOCK INPUT R_ch MSB LSB MSB LSB MSB ...

  • Page 8

    ... Figure 4 illustrates the system clock connections for an external clock or crystal oscillator. The PCM1727 internal PLL can be programmed for three different sampling frequencies (LRCIN), as shown in Table I. The internal sampling clocks generated by the various programmed frequencies are shown in Table II ...

  • Page 9

    ... L, R, Mono, Mute TABLE III. Selectable Functions. PROGRAM REGISTER BIT MAPPING The PCM1727 special functions are controlled using four program registers which are 16 bits long. These registers are all loaded using MD. After the 16 data bits are clocked in used to latch in the data to the appropriate register. ...

  • Page 10

    ... TABLE VII. Reset (RSTB) Function. . NOTE: (1) output amplifier. 0dB Bits 3 (IW0) and 4 (IW1) are used to determine input word resolution. PCM1727 can be set up for input word resolu- tions of 16, 20 bits: Bit 4 (IW1 Bits and 8 (PL0:3) are used to control output format. ...

  • Page 11

    ... Reserved input is DC. When the output is forced to bipolar zero, Reserved there may be an audible click. PCM1727 allows the zero detect feature to be disabled so the user can implement an external muting circuit MCH ...

  • Page 12

    ... OUTPUT FILTERING For testing purposes, all dynamic tests are done on the PCM1727 using a 20kHz low-pass filter. This filter limits the measured bandwidth for THD+N, etc. to 20kHz. Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the specifications ...

  • Page 13

    ... Reset The PCM1727 has both an internal power-on reset circuit and the RSTB pin (pin 10) which accepts an external forced reset by RSTB = LOW. For internal power-on reset, initial- ize (reset) is done automatically at power on V (typ). During internal reset = LOW, the output of the DAC is invalid and the analog outputs are forced illustrates the timing of the internal power-on reset ...

  • Page 14

    ... Figure 17. AC-3 APPLICATION CIRCUIT A typical application for the PCM1727 is AC-3 5.1 channel audio decoding and playback. This circuit uses the PCM1727 to develop the audio system clock from the 27MHz video clock, with the SCKO2 pin used to drive the AC-3 decoder and two PCM1720 units, the non-PLL version of the PCM1723 and PCM1727 ...

  • Page 15

    ... PGND DGND Post 17 14 BCKIN V L Low Pass OUT Filter 19 LRCIN 18 15 DIN CAP + PCM1727 7 Post Low Pass OUT 10 Filter RSTB 10k 20 SCKO2 +5V Analog 16 ZERO 21 24 SCKO1 XT2 1 6 XT1 SCKO3 27MHz Master Clock Input V ...

  • Page 16

    ... Changed “XT2 should be connected” to “XT2 must be connected.” Added sentence regarding XT1 signal amplitude and C1, C2 determination. Figure 3 Changed 2.0V/0.8V to 1.2V/0.4V. Deleted paragraph regarding frequency error. Changed B3 from “YES” to “res” (typo). Added sentence to Bit 6 regarding interval time must be greater than 20 s. Changed Figure 18. www.ti.com DESCRIPTION PCM1727 SBAS077A ...

  • Page 17

    ... PACKAGING INFORMATION (1) Orderable Device Status PCM1727E ACTIVE PCM1727EG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...

  • Page 18

    DB (R-PDSO-G**) 28 PINS SHOWN 0, 2,00 MAX PINS ** DIM A MAX A MIN NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not ...

  • Page 19

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...