The PCM1772 and PCM1773 devices are CMOS, monolithic, integrated circuits which include stereo digital-to-analog converters, lineout circuitry, and support circuitry in small TSSOP-16 and VQFN-20 packages

PCM1772

Manufacturer Part NumberPCM1772
DescriptionThe PCM1772 and PCM1773 devices are CMOS, monolithic, integrated circuits which include stereo digital-to-analog converters, lineout circuitry, and support circuitry in small TSSOP-16 and VQFN-20 packages
ManufacturerTexas Instruments
PCM1772 datasheet
 


Specifications of PCM1772

# Dacs2# Inputs / # Outputs0 / 2
ArchitectureMultilevel Delta-SigmaResolution(bits)24
Sampling Rate(max)(khz)48Control InterfaceSPI
Digital Audio InterfaceL,R,I2SThd+n(typ)(%)0.007
Dac Snr(typ)(db)98Power Consumption(typ)(mw)6.5
Operating Temperature Range(c)0 to 70Analog Voltage Av/dd(min)(v)1.6
Analog Voltage Av/dd(max)(v)3.6Pin/package16TSSOP, 20VQFN
1
2
3
4
5
6
7
8
9
10
11
Page 11
12
Page 12
13
Page 13
14
Page 14
15
Page 15
16
Page 16
17
Page 17
18
Page 18
19
Page 19
20
Page 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Page 13/37

Download datasheet (642Kb)Embed
PrevNext
www.ti.com
System Clock, Reset, and Functions
System Clock Input
The PCM1772 and PCM1773 devices require a system clock for operating the digital interpolation filters and
multilevel - modulators. The system clock is applied at terminal 16 (SCKI).
clock frequencies for common audio sampling rates.
Figure 18
shows the timing requirements for the system clock input. For optimal performance, it is important to
use a clock source with low phase jitter and noise.
Table 1. System Clock Frequency for Common Audio Sampling Frequencies
SAMPLING FREQUENCY, LRCK
48 kHz
44.1 kHz
32 kHz
24 kHz
22.05 kHz
16 kHz
12 kHz
11.025 kHz
8 kHz
SCKI
SYMBOL
t
System clock pulse duration, HIGH
(SCKH)
t
System clock pulse duration, LOW
(SCKL)
t
System clock pulse cycle time
(SCKY)
(1) 1/(128 f
), 1/(192 f
), 1/(256 f
S
S
S
DETAILED DESCRIPTION
SYSTEM CLOCK FREQUENCY, SCKI (MHz)
128 f
S
6.144
5.6448
4.096
3.072
2.8224
2.048
1.536
1.4112
1.024
t
(SCKH)
t
(SCKL)
t
(SCKY)
PARAMETER
(1)
) or 1/(384 f
)
S
Figure 18. System Clock Timing
Submit Documentation Feedback
PCM1772, PCM1773
SLES010G – SEPTEMBER 2001 – REVISED MARCH 2007
Table 1
shows examples of system
192 f
256 f
384 f
S
S
9.216
12.288
18.432
8.4672
11.2896
16.9344
6.144
8.192
12.288
4.608
6.144
9.216
4.2336
5.6448
8.4672
3.072
4.096
6.144
2.304
3.072
4.608
2.1168
2.8224
4.2336
1.536
2.048
3.072
0.7 V
CC1
0.3 V
CC1
T0005-01
MIN
7
7
52
S
UNIT
ns
ns
ns
13