The PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders

PCM9211

Manufacturer Part NumberPCM9211
DescriptionThe PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders
ManufacturerTexas Instruments
PCM9211 datasheet
 


Specifications of PCM9211

Jitter(ps)50Sampling Rate(max)(khz)216
Power Supply(v)4.5-5.5 for Analog ,2.9-3.6 for DIXAdc Resolution(bits)24
Adc Sample Rate (ksps)96Control ModeSPI, I2C, Hardware
InputsPCM,S/PDIF, ADCOutputPCM,S/PDIF
Operating Temperature Range(c)-40 to 85Pin/package48LQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Page 31
32
Page 32
33
Page 33
34
Page 34
35
Page 35
36
Page 36
37
Page 37
38
Page 38
39
Page 39
40
Page 40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
Page 31/121

Download datasheet (2Mb)Embed
PrevNext
www.ti.com
Channel Status Data, User Data, and Validity Flag
The PCM9211 can output decoded channel status data, user data, and a validity flag synchronized with audio
data from the input S/PDIF signal. These signals can be transmitted from any of the three MPIOs (MPIO_A,
MPIO_B, or MPIO_C). To assign this function to the MPIOs, see the
Each type of output data has own dedicated output pin:
Channel status data (C) are output through MPIOs assigned as COUT.
User data (U) are output through MPIOs assigned as UOUT.
Validity flag (V) is output through MPIOs assigned as VOUT
Data (left and right) are identified as DOUT.
C, U, and V output data are synchronized with the recovered LRCKO (left-right clock output) from the S/PDIF
input signal.
The polarity of the recovered LRCKO from the S/PDIF input depends on the Register 2Fh/RXFMT[2:0] setting.
The beginning of each S/PDIF frame (BFRAME) is provided as one of the outputs on the MPIO. It can be used to
indicate the start of the frame to the decoding DSP. If the DIR decodes a start-of-frame preamble on the decoded
data, then it sets BFRAME high for 8xLRCK periods to signify the start of the frame.
LRCKO can be used as a reference clock for each of the data outputs, BFRAME, DOUT, COUT, UOUT, and
VOUT. The relationship between each output is shown in
Numbers 0 to 191 of DOUT, COUT, UOUT, and VOUT in
biphase signal.
RECOVERED
2
LRCKO (I S)
RECOVERED
2
LRCKO (All except I S)
17±1BCK
BFRAME
DOUT
191R
COUT
C191R
VOUT
U191R
Figure 24. LRCKO, DOUT, BFRAME, COUT, UOUT, and VOUT Output Timing
The RXVDLY Register in Register 22h controls when the VOUT pin goes high (either immediately, or at the start
of the sample/frame).
Figure 25
shows these timing sequences.
DOUT
VOUT
(RXVDLY = 1)
VOUT
(RXVDLY = 0)
Copyright © 2010, Texas Instruments Incorporated
MPIO
Figure
24.
Figure 24
0L
0R
1L
1R
C0L
C0R
C1L
U0L
U0R
U1L
L(n)
R(n)
L(n+1)
R(n+1)
L(n+2)
V-bit = 1
Figure 25. RXVDLY and VOUT Timing
Product Folder Link(s):
PCM9211
PCM9211
SBAS495 – JUNE 2010
section.
indicate the frame number of the input
2L
2R
3L
C1R
C2L
C2R
U1R
U2L
U2R
R(n+2)
17 BCLK
Submit Documentation Feedback
31