The PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders

PCM9211

Manufacturer Part NumberPCM9211
DescriptionThe PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders
ManufacturerTexas Instruments
PCM9211 datasheet
 


Specifications of PCM9211

Jitter(ps)50Sampling Rate(max)(khz)216
Power Supply(v)4.5-5.5 for Analog ,2.9-3.6 for DIXAdc Resolution(bits)24
Adc Sample Rate (ksps)96Control ModeSPI, I2C, Hardware
InputsPCM,S/PDIF, ADCOutputPCM,S/PDIF
Operating Temperature Range(c)-40 to 85Pin/package48LQFP
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Page 57/121

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Packet Protocol
A master device must control the packet protocol, which consists of a start condition, slave address with
read/write bit, data if a write procedure is desired, or an acknowledgment if read and stop conditions exist. The
PCM9211 supports both slave receiver and transmitter functions. Details of the DATA pulse for both write and
read operations are described in
Figure
SDA
SCL
1 – 7
8
St
Slave address
R/W
Start
R/W:
Read o peration if 1; otherwise, write operation
condition
ACK:
Acknowledgement of a byte if 0, n ot Acknowledgement of a bite if 1
DATA:
8 b its ( byte) , Details are described in write and read operation
Write Operation
The PCM9211 can only function as an I
single or multiple accesses. The master sends a PCM9211 slave address with a write bit, a register address, and
the data. When undefined registers are accessed, the PCM9211 does not send an acknowledgment.
illustrates the write operation. The register address and the write data are 8-bit, MSB-first format.
Transmitter
M
M
M
Data Type
St
slave
W
address
M: Master Device S: Slave Device St: Start Condition W: Write ACK: Acknowledge Sp: Stop Condition
Figure 41. Framework for Write Operation
Read Operation
A master can read the PCM9211 registers. The value of the register address is stored in an indirect index
register in advance. The master sends the PCM9211 slave address with a read bit after storing the register
address. The PCM9211 then transfers the data to which the index register points.
operation.
Transmitter
M
M
M
Data Type
St
slave
W
address
M: Master Device S: Slave Device St: Start Condition Sr: Repeated Start Condition W: Write R: Read
ACK: Acknowledge NACK: Not Acknowledge Sp: Stop Condition
Note:
The slave address after the repeated start condition must be the same as the previous slave address.
Figure 42. Framework for Read Operation
Copyright © 2010, Texas Instruments Incorporated
40.
9
1 – 8
9
1 – 8
ACK
DATA
ACK
DATA
2
Figure 40. I
C Packet Protocol
2
C slave. A master can write to any PCM9211 registers using either
S
M
S
M
S
ACK
reg
ACK
write
ACK
address
data 1
S
M
S
M
M
ACK
reg address ACK
Sr
slave address
Product Folder Link(s):
PCM9211
PCM9211
SBAS495 – JUNE 2010
9
9
Sp
ACK
ACK
Stop
condition
.
Figure 41
M
S
S
M
write
ACK
ACK
Sp
data 2
Figure 42
shows the read
M
S
S
M
M
R
ACK
read
NACK
Sp
data
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