The PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders

PCM9211

Manufacturer Part NumberPCM9211
DescriptionThe PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders
ManufacturerTexas Instruments
PCM9211 datasheet
 


Specifications of PCM9211

Jitter(ps)50Sampling Rate(max)(khz)216
Power Supply(v)4.5-5.5 for Analog ,2.9-3.6 for DIXAdc Resolution(bits)24
Adc Sample Rate (ksps)96Control ModeSPI, I2C, Hardware
InputsPCM,S/PDIF, ADCOutputPCM,S/PDIF
Operating Temperature Range(c)-40 to 85Pin/package48LQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
Page 61
62
Page 62
63
Page 63
64
Page 64
65
Page 65
66
Page 66
67
Page 67
68
Page 68
69
Page 69
70
Page 70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
Page 65/121

Download datasheet (2Mb)Embed
PrevNext
www.ti.com
DATA
B7
B6
Reg Name
RSV
RSV
Default Value
0
0
Memo
XTIWT[1:0]: Crystal OSC, Oscillation Start-up Wait Time Setting
00: 25 ms
01: 50 ms
10: 100 ms
11: 200 ms
XTIWT is counted by the PLL generated clock.
These are the resulting values when the PLL is running with a free-run clock because of no S/PDIF input.
After these delay times, the Main Port source changes from DIR to ADC when DIR is unlocked.
PRTPRO[1:0]: Process for Parity Error Detection
00: No process
01: For PCM data only, an 8x continuous parity error is replaced by previous data and muted after ninth
parity error at EPARITY = 1 (default)
10: For PCM and non-PCM data, an 8x continuous parity error is replaced by previous data and muted
after ninth parity error at EPARITY = 1
11: Reserved (The definition of Non-PCM depends on the Non-PCM Definition Setting Register)
Validity flag, user bit, channel status, Non-PCM and DTS-CD detection should be refreshed by waiting
more than 192/f
without any parity error.
S
ERRWT[1:0]: ERROR Release Wait Time Setting
00: ERROR Release after 48 counts of preamble B (Default), 192 ms at f
01: ERROR Release after 12 counts of preamble B
10: ERROR Release after six counts of preamble B
11: ERROR Release after three counts of preamble B
These counts are only available when DIR is unlocked or DIR sampling frequency is changed or exceeds
limits defined by DIR Acceptable f
CLKST also uses ERRWT to release.
Copyright © 2010, Texas Instruments Incorporated
Register 23h, DIR Initial Settings 3/3
(Address: 23h, Write and Read)
B5
B4
B3
XTIWT1
XTIWT0
PRTPRO1
0
0
0
Range Setting and Mask registers.
S
Product Folder Link(s):
PCM9211
PCM9211
SBAS495 – JUNE 2010
B2
B1
B0
PRTPRO0
ERRWT1
ERRWT0
1
0
0
= 48 kHz
S
Submit Documentation Feedback
65