The PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders

PCM9211

Manufacturer Part NumberPCM9211
DescriptionThe PCM9211 is a complete analog and digital front-end for today's multimedia players and recorders
ManufacturerTexas Instruments
PCM9211 datasheet
 


Specifications of PCM9211

Jitter(ps)50Sampling Rate(max)(khz)216
Power Supply(v)4.5-5.5 for Analog ,2.9-3.6 for DIXAdc Resolution(bits)24
Adc Sample Rate (ksps)96Control ModeSPI, I2C, Hardware
InputsPCM,S/PDIF, ADCOutputPCM,S/PDIF
Operating Temperature Range(c)-40 to 85Pin/package48LQFP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
Page 71
72
Page 72
73
Page 73
74
Page 74
75
Page 75
76
Page 76
77
Page 77
78
Page 78
79
Page 79
80
Page 80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
Page 75/121

Download datasheet (2Mb)Embed
PrevNext
www.ti.com
DATA
B7
B6
Reg Name
OERROR1
ONPCM1
Default Value
N/A
N/A
Memo
OERROR1: ERROR Port Output Status
0: No ERROR
1: Detect ERROR
This register setting follows the register setting of the ERROR factor.
ONPCM1: NPCM Port Output Status
0: PCM data
1: Non-PCM data
This register setting follows the register setting of non-PCM data identification.
OEMPHF1: Emphasis Flag in Channel Status
0: No emphasis
1: Emphasis
ODTSCD1: DTS-CD/LD Detection
0: No DTS-CD/LD
1: DTS-CD/LD
This register setting follows the register setting for DTS-CD/LD detection conditions.
OCSRNW1: Channel Status Data of Beginning 48-bit Renewal
0: Not detect renewal
1: Detect renewal
OPCRNW1:Burst Preamble P
Renewal
C
0: Not detect renewal
1: Detect renewal
OFSCHG1: Renewal Flag of f
Calculator Result
S
0: Not detect renewal
1: Detect renewal
OADLVL1: ADC Input Level Detection Status
0: Not detect the defined threshold input level
1: Detect the defined threshold input level
NOTE: The threshold input level is defined by Register 2Eh, ADLVLTH[1:0].
When this register is read, the INT1 output is cleared.
Copyright © 2010, Texas Instruments Incorporated
Register 2Dh, INT1 Output Register
(Address: 2Dh, Read-Only)
B5
B4
B3
OEMPHF1
ODTSCD1
OCSRNW1
N/A
N/A
N/A
Product Folder Link(s):
PCM9211
PCM9211
SBAS495 – JUNE 2010
B2
B1
B0
OPCRNW1
OFSCHG1
OADLVL1
N/A
N/A
N/A
Submit Documentation Feedback
75