IC BUFF/DVR NON-INVERT SOT235

 

SN74LVC1G07DBVR

Manufacturer Part NumberSN74LVC1G07DBVR
DescriptionIC BUFF/DVR NON-INVERT SOT235
ManufacturerTexas Instruments
Series74LVC
SN74LVC1G07DBVR datasheets

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Specifications of SN74LVC1G07DBVR

Logic TypeBuffer/Line Driver, Non-Inverting with Open DrainNumber Of Elements1
Number Of Bits Per Element1Current - Output High, Low32mA, 32mA
Voltage - Supply1.65 V ~ 5.5 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / CaseSOT-23-5, SC-74A, SOT-25
Logic FamilyLVCNumber Of Channels Per ChipSingle
PolarityNon-InvertingSupply Voltage (max)5.5 V
Supply Voltage (min)1.65 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMTLow Level Output Current32 mA
Minimum Operating Temperature- 40 COutput TypeOpen Drain
Propagation Delay Time4.2 ns @ 3.3 V or 3.5 ns @ 5 VNumber Of Lines (input / Output)1 / 1
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names296-8485-2
SN74LVC1G07DCKR PDF datasheetSN74LVC1G07DBVRG4 PDF datasheet #2
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SN74LVC1G07
SCES296X – FEBRUARY 2000 – REVISED DECEMBER 2010
PARAMETER MEASUREMENT INFORMATION
R
L
From Output
Under Test
R
C
L
L
(see Note A)
LOAD CIRCUIT
V
CC
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
5 V 0.5 V
t
w
V
Input
M
VOLTAGE WAVEFORMS
PULSE DURATION
V
V
Input
M
M
t
PLH
V
Output
M
t
PHL
V
Output
M
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. C
includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, t
F. t
is measured at V
.
PZL
M
G. t
is measured at V
+ V .
PLZ
OL
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
Submit Documentation Feedback
(OPEN DRAIN)
V
LOAD
S1
Open
GND
t
PZL
t
PLZ
INPUT
V
V
M
LOAD
V
t
/t
I
r
f
V
2 ns
V
/2
2
V
CC
CC
CC
V
2 ns
V
/2
2
V
CC
CC
CC
3 V
2.5 ns
1.5 V
6 V
V
2.5 ns
V
/2
2
V
CC
CC
CC
Timing Input
V
I
V
M
Data Input
0 V
V
I
Output
Control
0 V
t
t
PHL
PZL
Output
V
OH
Waveform 1
V
M
S1 at V
LOAD
V
OL
(see Note B)
t
t
PLH
PZH
Output
V
OH
Waveform 2
V
M
S1 at V
LOAD
V
OL
(see Note B)
LOW- AND HIGH-LEVEL ENABLING
and t
are the same as t
.
PLZ
PZL
pd
Product Folder Link(s):
SN74LVC1G07
www.ti.com
TEST
S1
(see Notes E and F)
V
LOAD
(see Notes E and G)
V
LOAD
t
/t
V
PHZ
PZH
LOAD
C
R
V
L
L
30 pF
1 k
0.15 V
500
0.15 V
30 pF
500
0.3 V
50 pF
50 pF
500
0.3 V
V
I
V
M
0 V
t
t
su
h
V
I
V
V
M
M
0 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
V
M
M
0 V
t
PLZ
V
LOAD
V
M
V
+ V
OL
V
OL
t
PHZ
V
LOAD
V
− V
LOAD/2
V
M
0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
10 MHz, Z
= 50 .
O
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