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FEATURES
Available in the Texas Instruments
NanoFree™ Package
Supports 5-V V
Operation
CC
Inputs Accept Voltages to 5.5 V
Max t
of 4.6 ns at 3.3 V
pd
Low Power Consumption, 10-μA Max I
24-mA Output Drive at 3.3 V
DBV PACKAGE
(TOP VIEW)
N.C.
1
A
2
GND
3
DRY PACKAGE
(TOP VIEW)
N.C.
1
6
A
2
5
GND
3
4
N.C.
No internal connection
–
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V V
The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an
independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going
(V
) and negative-going (V
) signals.
T+
T–
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SINGLE SCHMITT-TRIGGER BUFFER
I
Supports Partial-Power-Down Mode
off
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
CC
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
N.C.
1
5
V
5
CC
A
2
GND
3
4
4
Y
YZP PACKAGE
(BOTTOM VIEW)
GND
Y
3
4
V
CC
A
2
N.C.
DNU
V
1
5
Y
CC
DNU – Do not use
operation.
CC
SN74LVC1G17
SCES351R – JULY 2001 – REVISED AUGUST 2007
DRL PACKAGE
(TOP VIEW)
N.C.
1
5
V
V
CC
CC
A
2
GND
Y
3
4
Y
YZV PACKAGE
(BOTTOM VIEW)
GND
Y
2
3
V
A
1
4
CC
. The I
circuitry disables the outputs,
off
off
Copyright © 2001–2007, Texas Instruments Incorporated