The ADS8504 is a complete 12-bit sampling A/D converter using state-of-the-art CMOS structures

 

ADS8504

Manufacturer Part NumberADS8504
DescriptionThe ADS8504 is a complete 12-bit sampling A/D converter using state-of-the-art CMOS structures
ManufacturerTexas Instruments
ADS8504 datasheets

Availability: In stock

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

 

Specifications of ADS8504

Resolution(bits)12Sample Rate (max)(sps)250kSPS
# Input Channels1InterfaceParallel CMOS
Dnl(max)(+/-lsb)0.45Inl(max)(+/-lsb)0.45
Inl (+/-)(max)(%)0.01100Snr(db)73
Sinad(db)73Input Range+/-10V
Power Consumption(typ)(mw)70Reference ModeInt , Ext
ArchitectureSARAnalog Voltage Av/dd(min)(v)4.75
Analog Voltage Av/dd(max)(v)5.25Digital Supply(min)(v)4.75
Digital Supply(max)(v)5.25Operating Temperature Range(c)-40 to 85
Pin/package28SOICIntegrated FeaturesInternal Reference
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
Page 1/23

Download datasheet (535Kb)Embed
Next
Burr Brown Products
from Texas Instruments
12-BIT 250-KSPS SAMPLING CMOS ANALOG-TO-DIGITAL CONVERTER
FEATURES
250-kHz Sampling Rate
Standard 10-V Input Range
73-dB SINAD With 45-kHz Input
0.45 LSB Max INL
0.45 LSB Max DNL
12 Bit No Missing Code
1 LSB Bipolar Zero Errors
0.4 PPM/ C Bipolar Zero Error Drift
Single 5-V Supply Operation
Pin-Compatible With ADS7804/05 (Low Speed)
and 16-Bit ADS8505
Uses Internal or External Reference
Full Parallel Data Output
70-mW Typ Power Dissipation at 250 KSPS
28-Pin SOIC Package
9.8 k
10 V Input
5 k
CAP
REF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
APPLICATIONS
Industrial Process Control
Data Acquisition Systems
Digital Signal Processing
Medical Equipment
Instrumentation
DESCRIPTION
The ADS8504 is a complete 12-bit sampling A/D
converter using state-of-the-art CMOS structures. It
contains a complete 12-bit, capacitor-based, SAR
A/D with S/H, reference,
microprocessor use, and 3-state output drivers.
The ADS8504 is specified at a 250-kHz sampling
rate over the full temperature range. Precision
resistors provide an industry standard
range, while the innovative design allows operation
from a single +5-V supply, with power dissipation
under 100 mW.
The ADS8504 is available in a 28-pin SOIC package
and is fully specified for operation over the industrial
-40 C to 85 C temperature range.
Clock
Successive Approximation Register and Control Logic
CDAC
2 k
Internal
Buffer
+2.5 V Ref
4 k
ADS8504
SLAS434A – JUNE 2005 – REVISED JUNE 2007
clock, interface
10-V input
R/C
CS
BYTE
BUSY
Output
Three
Latches
State
and
Parallel
Three
Data
State
Comparator
Bus
Drivers
Copyright © 2005–2007, Texas Instruments Incorporated
for

ADS8504 Summary of contents

  • Page 1

    ... The ADS8504 is available in a 28-pin SOIC package and is fully specified for operation over the industrial - temperature range. Clock Successive Approximation Register and Control Logic ...

  • Page 2

    ... DC ACCURACY INL Integral linearity error DNL Differentiall linearity error No missing codes (2) Transition noise (1) LSB means least significant bit. For the 12-bit, 10-V input ADS8504, one LSB is 4.88 mV. (2) Typical rms noise at worst case transitions and temperatures. 2 PACKAGE/ORDERING INFORMATION MINIMUM SPECIFICATION PACKAGE SINAD TEMPERATURE ...

  • Page 3

    ... Input kHz I FS Step Ext. 2.5-V Ref 1.6 mA SINK I = 500 µA SOURCE Hi-Z state OUT Hi-Z state Figure 24. Adjustable to zero with external potentiometer. Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 MIN TYP MAX -0.25 0.25 7 -0.25 0. 0.4 -0.5 0 -95 ...

  • Page 4

    ... ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 ELECTRICAL CHARACTERISTICS (continued - 250 kHz DIG PARAMETER Bus relinquish timing POWER SUPPLIES V Digital input voltage DIG V Analog input voltage ANA I Digital input current DIG I Analog input current ANA ...

  • Page 5

    ... Reference input/output. 2.2- F tantalum capacitor to ground. Analog supply input. Nominally +5 V. Decouple to ground with 0.1- F ceramic and 10- F tantalum capacitors. Digital supply input. Nominally +5 V. Connect directly to pin 27. Must be Analog input. Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 DESCRIPTION V ANA . ...

  • Page 6

    ... ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 SPURIOUS FREE DYNAMIC RANGE vs FREE-AIR TEMPERATURE 110 kHz i 100 −40 − − Free-Air-Temperature − Figure 1. SIGNAL-TO-NOISE AND DISTORTION vs FREE-AIR TEMPERATURE kHz i 40 −40 − ...

  • Page 7

    ... Code (Binary 2’s Complement in Decimal) Figure 13. DNL 1024 1536 2048 2560 Code (Binary 2’s Complement in Decimal) Figure 14. Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 SUPPLY CURRENT vs FREE-AIR TEMPERATURE − ...

  • Page 8

    ... The combination of CS (pin 25) and R/C (pin 24) low for a minimum immediately puts the sample/hold of the ADS8504 in the hold state and starts conversion n. BUSY (pin 26) goes low and stays low until conversion n is completed and the internal output register has been updated. All new convert commands during BUSY low will abort the conversion in progress and reset the ADC (see The ADS8504 begins tracking the input signal at the end of the conversion ...

  • Page 9

    ... D4 READING DATA The ADS8504 outputs full or byte-reading parallel data in binary 2's complement data output format. The parallel output is active when R/C (pin 24) is high and CS (pin 25) is low. Any other combination of CS and R/C 3-states the parallel output. Valid conversion data can be read in a full parallel, 12-bit word or two 8-bit bytes on pins 6-13 and pins 15-22 ...

  • Page 10

    ... ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 Table 2. Ideal Input Voltages and Output Codes DESCRIPTION Full-scale range Least significant bit (LSB) Full scale (10 V-1 LSB) Midscale One LSB below midscale -Full scale PARALLEL OUTPUT (After a Conversion) After conversion n is completed and the output registers have been updated, BUSY (pin 26) goes high. Valid data from conversion n is available on D11-D0 (pins 6-13 and 15-18) ...

  • Page 11

    ... Convert Acquire t conv Hi−Z State t en Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 + Bit 4 Bit Bit 6 Bit 7 19 Bit 8 18 Bit 9 17 Bit Bit 11 (MSB) Acquire ...

  • Page 12

    ... DATA BUS ADC RESET The ADC reset function of the ADS8504 can be used to terminate the current conversion cycle. Bringing R/C low for at least 40 ns while BUSY is low will initiate the ADC reset. To initiate a new conversion, R/C must return to the high state and remain high long enough to acquire a new sample (see the next conversion sequence ...

  • Page 13

    ... Pin 1 or 33.2 kW Pin 6 Pin4 2.2 mF 2.2 mF GND 100 nF Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 ADS8504 VIN REF 2.2 mF AGND1 GND CAP DGND GND AGND2 GND 13 ...

  • Page 14

    ... ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 CALIBRATION The ADS8504 can be trimmed in hardware or software. The offset should be trimmed before the gain since the offset directly affects the gain. To achieve optimum performance, several iterations may be required. Hardware Calibration To calibrate the offset and gain of the ADS8504, install the proper resistors and potentiometers as shown in Figure 24(a) ...

  • Page 15

    ... The end result is a minimal requirement for the anti-alias filter on the front end. Any op amp sufficient for the signal in an application is sufficient to drive the ADS8504. The resistive front end of the ADS8504 also provides an assured 25-V overvoltage protection. In most cases, this eliminates the need for external input protection circuitry ...

  • Page 16

    ... SLAS434A – JUNE 2005 – REVISED JUNE 2007 INTERMEDIATE LATCHES The ADS8504 does have 3-state outputs for the parallel port, but intermediate latches should be used if the bus active during conversions. If the bus is not active during conversion, the 3-state outputs can be used to isolate the A/D from other peripherals on the same bus ...

  • Page 17

    ... Changes from Original (June, 2005 Revision Deleted text from basic operation description Changed text in starting a conversion Changed operation descriptions and R/C in table Added SAR Reset Timing................................................................................................................................................... 12 Added ADC RESET section ............................................................................................................................................... 12 Revision History ....................................................................................................... ...................................................................................................................... 8 description................................................................................................................ 8 ................................................................................................................ 9 Submit Documentation Feedback ADS8504 SLAS434A – JUNE 2005 – REVISED JUNE 2007 Page 17 ...

  • Page 18

    ... ADS8504IBDW ACTIVE ADS8504IBDWG4 ACTIVE ADS8504IBDWR ACTIVE ADS8504IBDWRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design ...

  • Page 19

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing ADS8504IBDWR SOIC DW PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 (mm) Diameter Width (mm) W1 (mm) 28 1000 330.0 32.4 11.35 Pack Materials-Page 1 11-Mar-2008 B0 (mm) K0 (mm Pin1 (mm) (mm) Quadrant 18.67 3.1 16.0 32.0 Q1 ...

  • Page 20

    ... Device Package Type ADS8504IBDWR SOIC PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 1000 Pack Materials-Page 2 11-Mar-2008 Width (mm) Height (mm) 346.0 346.0 49.0 ...

  • Page 21

    ...

  • Page 22

    ...

  • Page 23

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...