The ADS8505 is a complete 16-bit sampling A/D converter using state-of-the-art CMOS structures

 

ADS8505

Manufacturer Part NumberADS8505
DescriptionThe ADS8505 is a complete 16-bit sampling A/D converter using state-of-the-art CMOS structures
ManufacturerTexas Instruments
ADS8505 datasheets

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Specifications of ADS8505

Resolution(bits)16Sample Rate (max)(sps)250kSPS
# Input Channels1InterfaceParallel CMOS
Dnl(max)(+/-lsb)1Inl(max)(+/-lsb)3
Inl (+/-)(max)(%)0.00450Snr(db)86
Sinad(db)86Input Range+/-10V
Power Consumption(typ)(mw)70Reference ModeInt , Ext
ArchitectureSARAnalog Voltage Av/dd(min)(v)4.75
Analog Voltage Av/dd(max)(v)5.25Digital Supply(min)(v)4.75
Digital Supply(max)(v)5.25Operating Temperature Range(c)-40 to 85
Pin/package28SOIC, 28SSOPIntegrated FeaturesInternal Reference
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from Texas Instruments
16-BIT 250-KSPS SAMPLING CMOS ANALOG-TO-DIGITAL CONVERTER
FEATURES
105dB SFDR at 250-kHz Sample Rate
Standard 10-V Input Range
1.5 LSB Max INL
1 LSB Max DNL, 16-Bits No Missing Codes
2 mV Max Bipolar Zero Error With 0.4
PPM/ C Drift
0.1% FSR Max Full-Scale Error With 2
PPM/ C Drift
Single 5-V Supply Operation
Pin-Compatible With ADS7805 (Low Speed)
and 12-Bit ADS8504/7804
Uses Internal or External Reference
Full Parallel Data Output
70-mW Typ Power Dissipation at 250 KSPS
28-Pin SSOP and SOIC Packages
9.8 kΩ
± 10 V Input
5 kΩ
CAP
REF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
APPLICATIONS
Industrial Process Control
Data Acquisition Systems
Digital Signal Processing
Medical Equipment
Instrumentation
DESCRIPTION
The ADS8505 is a complete 16-bit sampling A/D
converter using state-of-the-art CMOS structures. It
contains a complete 16-bit, capacitor-based, SAR
A/D with S/H, reference,
microprocessor use, and 3-state output drivers.
The ADS8505 is specified at a 250-kHz sampling
rate over the full temperature range. Precision
resistors provide an industry standard
range, while the innovative design allows operation
from a single +5-V supply, with power dissipation
under 100 mW.
The ADS8505 is available in 28-pin SOIC and 28-pin
SSOP packages, both fully specified for operation
over the industrial –40 C to 85 C temperature range.
Clock
Successive Approximation Register and Control Logic
CDAC
2 kΩ
Internal
Buffer
+2.5 V Ref
4 kΩ
ADS8505
SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007
clock, interface
10-V input
R/C
CS
BYTE
BUSY
Output
Three
Latches
State
and
Parallel
Three
Data
State
Comparator
Bus
Drivers
Copyright © 2005–2007, Texas Instruments Incorporated
for

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ADS8505 Summary of contents

  • Page 1

    ... The ADS8505 is available in 28-pin SOIC and 28-pin SSOP packages, both fully specified for operation over the industrial – temperature range. Clock ...

  • Page 2

    ... MEDIA, QTY ADS8505IBDW Tube ADS8505IBDWR Tape and Reel, 1000 ADS8505IBDB Tube ADS8505IBDBR Tape and Reel, 2000 ADS8505IDW Tube ADS8505IDWR Tape and Reel, 1000 ADS8505IDB Tube ADS8505IDBR Tape and Reel, 2000 UNIT 25V + AGND2 – 0.3 V ANA 0 ...

  • Page 3

    ... OH Leakage current Output capacitance (1) LSB means least significant bit. For the 16-bit, 10-V input ADS8505, one LSB is 305 V. (2) Typical rms noise at worst case transitions and temperatures. (3) As measured with fixed resistors shown in (4) Full-scale error is the worst case of –full-scale or +full-scale deviation from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error ...

  • Page 4

    ... AGND2 5 24 D15 (MSB D14 7 22 D13 8 21 D12 9 20 D11 10 19 D10 DGND Submit Documentation Feedback ADS8505IB MAX MIN TYP 5.25 4. 5.25 4. 100 70 85 –40 125 –55 150 – ...

  • Page 5

    ... Reference input/output. 2.2- F Tantalum capacitor to ground. Analog supply input. Nominally +5 V. Decouple to ground with 0.1- F ceramic and 10- F tantalum capacitors. Digital supply input. Nominally +5 V. Connect directly to pin 27. Must be Analog input. See Figure 28. Submit Documentation Feedback ADS8505 SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 DESCRIPTION V ANA . 5 ...

  • Page 6

    ... ADS8505 SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 SPURIOUS FREE DYNAMIC RANGE vs FREE-AIR TEMPERATURE 110 105 100 250 KSPS kHz i 80 -40 - Free-Air Temperature - C º A Figure 1. SIGNAL-TO-NOISE AND DISTORTION vs FREE-AIR TEMPERATURE 100 f = 250 KSPS ...

  • Page 7

    ... F Capacitor CAP Pin (pin Code ESR - Resistance - W Submit Documentation Feedback ADS8505 SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 NEGATIVE FULL-SCALE ERROR vs FREE-AIR TEMPERATURE 0.2 External Reference 0.15 0.1 0.05 0 −0.05 −0.1 −0.15 −0.2 −40 − ...

  • Page 8

    ... Figure 21 shows a basic circuit to operate the ADS8505 with a full parallel data output. Taking R/C (pin 24) low for a minimum (1.75 s max) initiates a conversion. BUSY (pin 26) goes low and stays low until the conversion is completed and the output registers are updated. Data is output in binary 2's complement format with the MSB on pin 6 ...

  • Page 9

    ... The combination of CS (pin 25) and R/C (pin 24) low for a minimum immediately puts the sample/hold of the ADS8505 in the hold state and starts conversion n. BUSY (pin 26) goes low and stays low until conversion n is completed and the internal output register has been updated. All new convert commands during BUSY low will abort the conversion in progress and reset the ADC (see The ADS8505 begins tracking the input signal at the end of the conversion ...

  • Page 10

    ... B8 READING DATA The ADS8505 outputs full or byte-reading parallel data in binary 2's complement data output format. The parallel output is active when R/C (pin 24) is high and CS (pin 25) is low. Any other combination of CS and R/C 3-states the parallel output. Valid conversion data can be read in a full parallel, 16-bit word or two 8-bit bytes on pins 6-13 and pins 15-22 ...

  • Page 11

    ... BYTE HIGH + Bit 8 ADS8505 Bit Bit 10 Bit 11 19 Bit 12 18 Bit 13 17 Bit Bit 15 (MSB) ADS8505 UNITS ...

  • Page 12

    ... ADS8505 SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 R/C BUSY MODE Acquire Previous DATA BUS Data Valid Figure 23. Conversion Timing with Outputs Enabled after Conversion (CS Tied Low R/C CS BUSY t d2 MODE Acquire DATA BUS Figure 24. Using CS to Control Conversion and Read Timing Pins 6 − ...

  • Page 13

    ... DATA BUS ADC RESET The ADC reset function of the ADS8505 can be used to terminate the current conversion cycle. Bringing R/C low for at least 40 ns while BUSY is low will initiate the ADC reset. To initiate a new conversion, R/C must return to the high state and remain high long enough to acquire a new sample (see the next conversion sequence ...

  • Page 14

    ... OPA 627 22 pF OPA 132 + Pin3 GND − Figure 27. Typical Driving Circuit ( Trim 200 Pin 1 or 33.2 kW Pin 6 Pin4 2.2 mF 2.2 mF GND 100 nF Submit Documentation Feedback www.ti.com ADS8505 VIN REF 2.2 mF AGND1 GND CAP DGND GND AGND2 GND ...

  • Page 15

    ... CALIBRATION The ADS8505 can be trimmed in hardware or software. The offset should be trimmed before the gain since the offset directly affects the gain. To achieve optimum performance, several iterations may be required. Hardware Calibration To calibrate the offset and gain of the ADS8505, install the proper resistors and potentiometers as shown in Figure 28(a) ...

  • Page 16

    ... The output of the buffer is capable of driving current load load requiring more than current from the CAP pin begins to degrade the linearity of the ADS8505. Using an external buffer allows the internal reference to be used for larger dc loads and ac loads. Do not attempt to directly drive an ac load with the output voltage on CAP ...

  • Page 17

    ... Intermediate latches are beneficial on any monolithic A/D converter. The ADS8505 has an internal LSB size Transients from fast switching signals on the parallel port, even when the A/D is 3-stated, can be coupled through the substrate to the analog circuitry causing degradation of converter performance. SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 ...

  • Page 18

    ... ADS8505 SLAS180B – SEPTEMBER 2005 – REVISED JUNE 2007 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (September, 2005 Revision Added SFDR value ............................................................................................................................................................... 1 Changed 3.0 to 1.5 Max INL................................................................................................................................................. 1 Changed 3.0 to 1.5 Minimum Relative Changed REF and CAP - reversed ...

  • Page 19

    ... ACTIVE ADS8505IBDWG4 ACTIVE ADS8505IBDWR ACTIVE ADS8505IBDWRG4 ACTIVE ADS8505IDB ACTIVE ADS8505IDBG4 ACTIVE ADS8505IDBR ACTIVE ADS8505IDBRG4 ACTIVE ADS8505IDW ACTIVE ADS8505IDWG4 ACTIVE ADS8505IDWR ACTIVE ADS8505IDWRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 20

    MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date ...

  • Page 21

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing ADS8505IBDBR SSOP DB ADS8505IBDWR SOIC DW ADS8505IDBR SSOP DB ADS8505IDWR SOIC DW PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 28 2000 330.0 16.4 8.1 28 1000 330.0 32.4 11.35 18.67 28 2000 330.0 16.4 8.1 28 1000 330 ...

  • Page 22

    ... Device Package Type ADS8505IBDBR SSOP ADS8505IBDWR SOIC ADS8505IDBR SSOP ADS8505IDWR SOIC PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 2000 DW 28 1000 DB 28 2000 DW 28 1000 Pack Materials-Page 2 1-Jul-2011 Width (mm) Height (mm) 346.0 346.0 33.0 346.0 346 ...

  • Page 23

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  • Page 24

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  • Page 25

    DB (R-PDSO-G**) 28 PINS SHOWN 0, 2,00 MAX PINS ** DIM A MAX A MIN NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not ...

  • Page 26

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...

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