ADS8519 | |
|---|---|
| Manufacturer Part Number | ADS8519 |
| Description | The ADS8519 is a complete 16-bit sampling analog-to-digital (A/D) converter using state-of-the-art CMOS structures |
| Manufacturer | Texas Instruments |
| ADS8519 datasheets |
|
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Specifications of ADS8519 | |||
|---|---|---|---|
| Resolution(bits) | 16 | Sample Rate (max)(sps) | 250kSPS |
| # Input Channels | 1 | Interface | Serial SPI |
| Dnl(max)(+/-lsb) | 1 | Inl(max)(+/-lsb) | 2 |
| Inl (+/-)(max)(%) | 0.00300 | Snr(db) | 93 |
| Sinad(db) | 92 | Input Range | +8.192V; +/-5V, 10V |
| Power Consumption(typ)(mw) | 100 | Reference Mode | Int , Ext |
| Architecture | SAR | Analog Voltage Av/dd(min)(v) | 4.75 |
| Analog Voltage Av/dd(max)(v) | 5.25 | Digital Supply(min)(v) | 1.65 |
| Digital Supply(max)(v) | 5.25 | Operating Temperature Range(c) | -40 to 85 |
| Pin/package | 28SSOP | Integrated Features | Internal Reference |
PrevNext
ADS8519
SLAS462D – JUNE 2007 – REVISED SEPTEMBER 2010
Neither the internal reference nor the buffer should be used to drive an external load. Such loading can degrade
performance. Any load on the internal reference causes a voltage drop across the 4kΩ resistor and affects gain.
The internal buffer is capable of driving ±2mA loads, but any load can cause perturbations of the reference at the
CDAC, degrading performance. It should be pointed out that, unlike other devices with a similar input structure,
the ADS8519 does not require a second high-speed amplifier used as a buffer to isolate the CAP pin from the
signal-dependent current in the R3
IN
The external reference voltage can vary from 3.9V to 4.2V. The reference voltage determines the size of the
least significant bit (LSB). The larger reference voltages produce a larger LSB, which can improve SNR. Smaller
reference voltages can degrade SNR.
2.2 F
m
100nF
2kW
Pin 2
V
IN
22pF
Pin 3
GND
GND
Figure 31. Typical Driving Circuitry (±10V, No Trim)
SPECIFIC FUNCTION
CS
R/C
BUSY
Initiate conversion and
1 > 0
0
output data using internal
0
1 > 0
clock
1 > 0
0
0
1 > 0
Initiate conversion and
output data using external
1 > 0
1
clock
1 > 0
1
0
0 > 1
No actions
0
0
0 > 1
x
x
Power down
x
x
x
x
Selecting output format
x
x
20
Submit Documentation Feedback
pin, but can tolerate it if one does exist.
+15 V
22pF
2kW
Pin 7
Pin 1
OPA627
Pin 6
or
OPA132
Pin 4
2.2 F
m
100nF
-15 V
GND
GND
GND
Table 3. Control Truth Table
EXT/INT
DATACLK
PWRD
SB/BTC
1
0
Output
0
1
0
Output
0
1
1
Input
0
1
1
Input
0
1
1
Input
x
0
1
Input
0
0
1
Input
0
x
x
0
x
x
x
0
x
x
x
1
x
x
x
x
x
x
x
x
Product Folder Link(s):
ADS8519
www.ti.com
ADS8519
R1
IN
AGND1
R2
IN
R3
IN
CAP
REF
2.2 F
m
2.2 F
m
AGND2
GND
GND
OPERATION
x
Initiates conversion n. Data from conversion n - 1
clocked out on DATA synchronized to 16 clock
x
pulses output on DATACLK.
x
Initiates conversion n.
x
Initiates conversion n.
Outputs data with or without SYNC pulse. See the
x
Reading Data
section.
x
Outputs data with or without SYNC pulse. See
Reading Data section.
x
x
This is an acceptable condition.
Analog circuitry powered. Conversion can
x
proceed..
Analog circuitry disabled. Data from previous
x
conversion maintained in output registers.
Serial data are output in binary twos complement
0
format.
1
Serial data are output in straight binary format.
Copyright © 2007–2010, Texas Instruments Incorporated
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