The ADS8528/48/68 contain eight low-power, 12-, 14-, or 16-bit, successive approximation register (SAR)-based analog-to-digital converters (ADCs) with true bipolar inputs

ADS8568

Manufacturer Part NumberADS8568
DescriptionThe ADS8528/48/68 contain eight low-power, 12-, 14-, or 16-bit, successive approximation register (SAR)-based analog-to-digital converters (ADCs) with true bipolar inputs
ManufacturerTexas Instruments
ADS8568 datasheet
 


Specifications of ADS8568

Resolution(bits)16Sample Rate (max)(sps)500kSPS
# Input Channels8InterfaceParallel CMOS, Serial SPI
Dnl(max)(+/-lsb)1.5Inl(max)(+/-lsb)3
Snr(db)91.5Sinad(db)89.5
Input RangeVref, 2VrefPower Consumption(typ)(mw)335
Reference ModeInt , ExtArchitectureSAR
Analog Voltage Av/dd(min)(v)4.5Analog Voltage Av/dd(max)(v)5.5
Digital Supply(min)(v)2.7Digital Supply(max)(v)5.5
Operating Temperature Range(c)-40 to 125Pin/package64LQFP, 64VQFN
Integrated FeaturesInternal Reference, Simultaneous Sampling  
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12-, 14-, 16-Bit, Eight-Channel, Simultaneous Sampling
ANALOG-TO-DIGITAL CONVERTERS
FEATURES
1
Family of 12-, 14-, 16-Bit, Pin- and
2
Software-Compatible ADCs
Maximum Data Rate Per Channel:
– ADS8528: 650kSPS (PAR) or
480kSPS (SER)
– ADS8548: 600kSPS (PAR) or
450kSPS (SER)
– ADS8568: 510kSPS (PAR) or
400kSPS (SER)
Excellent AC Performance:
– Signal-to-Noise Ratio:
ADS8528: 73.9dB
ADS8548: 85dB
ADS8568: 91.5dB
– Total Harmonic Distortion:
ADS8528: –89dB
ADS8548: –91dB
ADS8568: –94dB
Programmable and Buffered Internal
Reference: 0.5V to 2.5V or 0.5V to 3.0V
Supports Input Voltage Ranges of Up to ±12V
Selectable Parallel or Serial Interface
Scalable Low-Power Operation Using
Auto-Sleep Mode: Only 32mW at 10kSPS
Fully Specified Over the Extended Industrial
Temperature Range
APPLICATIONS
Protection Relays
Power Quality Measurement
Multi-Axis Motor Control
Programmable Logic Controllers
Industrial Data Acquisition
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Check for Samples: ADS8528, ADS8548,
DESCRIPTION
The ADS8528/48/68 contain eight low-power, 12-,
14-, or 16-bit, successive approximation register
(SAR)-based analog-to-digital converters (ADCs) with
true bipolar inputs. These channels are grouped in
four pairs, thus allowing simultaneous high-speed
signal acquisition of up to 650kSPS.
The devices support selectable parallel or serial
interface
programmable reference allows handling of analog
input signals with amplitudes up to ±12V.
The ADS8528/48/68 family supports an auto-sleep
mode for minimum power dissipation and is available
in both QFN-64 and LQFP-64 packages. The entire
family is specified over a temperature range of –40°C
to +125°C.
CH_A0
CH_A1
CH_B0
CH_B1
CH_C0
CH_C1
CH_D0
CH_D1
REFIO
ADS8528
ADS8548
ADS8568
SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011
ADS8568
with
daisy-chain
capability.
Clock
Generator
SAR ADC
Control
SAR ADC
Logic
SAR ADC
SAR ADC
Config
Register
SAR ADC
SAR ADC
SAR ADC
I/O
SAR ADC
2.5/3V
String DAC
Reference
Copyright © 2011, Texas Instruments Incorporated
The
Control
Signal
Bus
Parallel
or Serial
Data Bus

ADS8568 Summary of contents

  • Page 1

    ... Software-Compatible ADCs • Maximum Data Rate Per Channel: – ADS8528: 650kSPS (PAR) or 480kSPS (SER) – ADS8548: 600kSPS (PAR) or 450kSPS (SER) – ADS8568: 510kSPS (PAR) or 400kSPS (SER) • Excellent AC Performance: – Signal-to-Noise Ratio: ADS8528: 73.9dB ADS8548: 85dB ADS8568: 91.5dB – Total Harmonic Distortion: ADS8528: – ...

  • Page 2

    ... For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Product Folder Link(s): FAMILY/ORDERING INFORMATION MAXIMUM DATA RATE: PAR/SER (kSPS/ch) 650/480 600/450 510/400 (1) (1) ADS8528 ADS8548 ADS8568 www.ti.com (1) SNR THD (dB, typ) (dB, typ) 73.9 –89 85 –91 91.5 – ...

  • Page 3

    ... SINAD 10kHz IN THD 10kHz IN SFDR 10kHz 10kHz IN In 4VREF mode BW In 2VREF mode ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 ADS8528 MIN TYP MAX UNIT 1.33 μs 480 kSPS 650 kSPS ...

  • Page 4

    ... Referenced to voltage at REFIO SNR 10kHz IN SINAD 10kHz IN THD 10kHz IN SFDR 10kHz 10kHz IN In 4VREF mode BW In 2VREF mode ADS8528 ADS8548 ADS8568 www.ti.com ADS8548 MIN TYP MAX UNIT 1.45 μs 450 kSPS 600 kSPS 14 Bits 14 Bits –1 ±0.5 ...

  • Page 5

    ... ELECTRICAL CHARACTERISTICS: ADS8568 All minimum/maximum specifications are ±10V, and f = max, unless otherwise noted. Typical values are DATA AVDD = 5V, and DVDD = 3.3V. PARAMETER SAMPLING DYNAMICS Conversion time Throughput rate f DATA DC ACCURACY Resolution No missing codes (1) Integral linearity error INL Differential linearity error ...

  • Page 6

    ... Reference output current is not limited internally. 6 Product Folder Link(s): = –40°C to +125°C, specified supply voltage range, VREF = 2.5V (internal +25°C, HVDD = 15V, HVSS = –15V, A CONDITIONS 0.2 VREF ADS8528 ADS8548 ADS8568 www.ti.com ADS8528, ADS8548, ADS8568 MIN TYP MAX UNIT –4VREF 4VREF V –2VREF 2VREF V ...

  • Page 7

    ... DATA = maximum DATA = 250kSPS DATA = 200kSPS DATA = 10kSPS DATA ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 ADS8528, ADS8548, ADS8568 MIN TYP MAX UNIT CMOS with Schmitt-Trigger 0.7 DVDD DVDD + 0.3 V DGND – 0.3 0.3 DVDD V – ...

  • Page 8

    ... DATA = 10kSPS DATA = maximum DATA = maximum DATA = maximum DATA = 250kSPS, auto-sleep mode DATA = 200kSPS, auto-sleep mode DATA = 10kSPS, normal operation DATA = 10kSPS, auto-sleep mode DATA ADS8528 ADS8548 ADS8568 www.ti.com ADS8528, ADS8548, ADS8568 MIN TYP MAX UNIT 3.4 4.5 mA 3.3 4.4 mA 2.7 3.6 mA 2.1 2.6 mA 1.7 mA 0.4 mA ...

  • Page 9

    ... SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 t XCLK t ACQ t BUFS t SCLK 1 t HDO t PDDO CH_x0 CH_x1 CH_x1 MSB SUDI D31 D3 D2 ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 t CVL t FSCV 32 t DTRI CH_x1 CH_x1 LSB D1 t HDI D1 D0 Don’t Care 9 ...

  • Page 10

    ... ADS8568 ADS8528, CLKSEL = 0 ADS8548, CLKSEL = 0 ADS8568, CLKSEL = 0 ADS8528 ADS8548 ADS8568 0.022 , AVDD = 5V, and DVDD = 2.7V to 5.5V, unless otherwise noted 1.5ns (10% to 90% of DVDD) and timed from a voltage level ADS8528 ADS8548 ADS8568 www.ti.com (1) (2) MIN TYP MAX UNIT 15.0 MHz 1 13 ...

  • Page 11

    ... ADS8548, CLKSEL = 0 ADS8568, CLKSEL = 0 ADS8528 ADS8548 ADS8568 , AVDD = 5V, and DVDD = 2.7V to 5.5V, unless otherwise noted 1.5ns (10% to 90% of DVDD) and timed from a voltage level ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 t CVL t CSCV t t HDO ...

  • Page 12

    ... AVDD = 5V, and DVDD = 2.7V to 5.5V, unless otherwise noted 1.5ns (10% to 90% of DVDD) and timed from a voltage level Input range: 4VREF ± W CH_XX C = 20pF 20pF S AGND W Figure 4. Equivalent Input Circuits ADS8528 ADS8548 ADS8568 www.ti.com t WRCS (1) (2) TYP MAX UNIT )/2. ...

  • Page 13

    ... AVDD 14 AGND 15 DB15/SDO_D 16 Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 PIN CONFIGURATIONS RGC PACKAGE QFN-64 (TOP VIEW) 7.3-mm x 7.3-mm Exposed Thermal Pad ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 48 HVDD 47 CH_A1 46 REFAN 45 AVDD 44 AGND 43 ...

  • Page 14

    ... STBY 9 RESET 10 REFEN AVDD 14 AGND 15 DB15/SDO_D 16 14 Product Folder Link(s): PM PACKAGE LQFP-64 (TOP VIEW) Copyright © 2011, Texas Instruments Incorporated ADS8528 ADS8548 ADS8568 www.ti.com 48 HVDD 47 CH_A1 46 REFAN 45 AVDD 44 AGND 43 REFAP 42 CH_A0 41 HW /SW 40 CONVST_D 39 CONVST_C 38 CONVST_B 37 CONVST_A ...

  • Page 15

    ... Data output for channel pair A. When SEL_CD = 0, data from channel pair C are also available on this output. When SEL_CD = 0 and SEL_B = 0, SDO_A acts as single data output for all eight channels. ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 section. 15 ...

  • Page 16

    ... SDO_C of the previous device in the chain. When DCEN = 0, connect to DGND. When DCEN = 1 and SEL_CD = 1, this pin is the daisy-chain data input for SDO_D of the previous device in the chain. When DCEN = 0, connect to DGND. ADS8528 ADS8548 ADS8568 www.ti.com Copyright © 2011, Texas Instruments Incorporated ...

  • Page 17

    ... CONVST_x. This mode is recommended to CCLK Reset and Power-Down Modes Power Supply Power Supply section. Power Supply Power Supply Power Supply ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 section for more details. section. Power Supply section. section. ...

  • Page 18

    ... Logic SAR ADC SAR ADC SAR ADC Config Register SAR ADC SAR ADC SAR ADC I/O SAR ADC String 2.5 VREF DAC AGND DGND ADS8528 ADS8548 ADS8568 www.ti.com BUSY/INT RANGE/XCLK HW/SW REFEN/WR STBY RESET CS/FS RD DB[15:0] ASLEEP PAR/SER SCLK Copyright © 2011, Texas Instruments Incorporated ...

  • Page 19

    ... G003 1 0.8 0.6 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 −1 0 2000 G005 ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 DNL vs CODE (ADS8528) 1000 1500 2000 2500 3000 3500 4000 Code G002 Figure 6. INL vs CODE (ADS8548 ±5V Range) IN 4000 6000 ...

  • Page 20

    ... G009 1 0.8 0.6 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 − 110 125 −40 −25 −10 G011 ADS8528 ADS8548 ADS8568 www.ti.com INL vs CODE (ADS8568 ±5V Range) IN Code Figure 12. DNL vs CODE (ADS8568 ±5V Range) IN Code Figure 14. GAIN ERROR vs TEMPERATURE ...

  • Page 21

    ... SUPPLY − 1µF on HVSS SUPPLY −60 −70 −80 −90 −100 100 120 140 160 180 200 Supply Noise Frequency (kHz) Figure 17. CODE HISTOGRAM (ADS8568, 16390 Hits) 8947 7389 0 8 Figure 19. SINAD vs TEMPERATURE − ...

  • Page 22

    ... AVDD (V) Figure 27. 22 Product Folder Link(s): = +25°C, HVDD = 15V, HVSS = –15V, AVDD = 5V, and DVDD = 3.3V maximum, unless otherwise noted. DATA (ADS8568, 2048-Point FFT −20 −40 −60 −80 −100 −120 −140 −160 −180 110 125 0 25 G019 CHANNEL-TO-CHANNEL ISOLATION vs ...

  • Page 23

    ... G025 BUFFER I/O SUPPLY CURRENT vs TEMPERATURE 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 −40 −25 −10 G027 ADS8568 INPUT SUPPLY CURRENT vs INPUT SUPPLY 4.5 4 3.5 3 2.5 2 1 110 125 5 6 G029 ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 ...

  • Page 24

    ... Graphs are valid for all devices of the family VREF = 2.5V (internal ±10V, and Product Folder Link(s): = +25°C, HVDD = 15V, HVSS = –15V, AVDD = 5V, and DVDD = 3.3V maximum, unless otherwise noted. DATA ADS8568 INPUT SUPPLY CURRENT vs DATA RATE 4.5 4.25 IHVDD 4 IHVSS 3.75 IHVDD (Auto-Sleep) 3.5 IHVSS (Auto-Sleep) 3 ...

  • Page 25

    ... ADS8528/48/68 With a minimum acquisition time of t 5.2MHz for the ADS8528, 6.0MHz for the ADS8548, or 6.7MHz for the ADS8568. The required bandwidth can be lower if the application allows a longer acquisition time. A gain error occurs if a given application does not fulfill the bandwidth requirement shown in Copyright © ...

  • Page 26

    ... SW With a minimum acquisition time of t the ADS8528, 2.3kΩ for the ADS8548, and 2.0kΩ for the ADS8568 in ±4VREF mode, or less than 1.2kΩ for the ADS8528, 1.0kΩ for the ADS8548, and 0.8kΩ for the ADS8568 in ±2VREF mode. The source impedance can be higher if the application allows longer acquisition time. ...

  • Page 27

    ... Product Folder Link(s): SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 Old Data Old Data Old Data ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 Old Data ...

  • Page 28

    ... C26 = 0) PAR = RD SER = FS INT Configuration (CONFIG) Equation 3: DECIMAL CODE BINARY CODE 204 00 1100 1100 511 01 1111 1111 1023 11 1111 1111 ADS8528 ADS8548 ADS8568 www.ti.com Figure 37. Register. The buffered DAC (3) HEXADECIMAL CODE CCh 1FFh 3FFh Copyright © 2011, Texas Instruments Incorporated ...

  • Page 29

    ... Product Folder Link(s): SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 Table 5. only; status of pins 9, 11, 20, and 34 are disregarded C13, and C[9:0] only; status of pins 9, 11, 20, and 34 are disregarded and C[9:0] ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 Equation 4: (4) SOFTWARE MODE (HW/ (if C29 = C28 = 0) ...

  • Page 30

    ... Power Up) BUSY (C20 = C21 = 0) PAR/SER = 1 FS SDI Initialization Data PAR/SER = Initialization Data C DB[15:0] [31:16] Figure 38. Configuration Register Update Options 30 Product Folder Link(s): C[31:0] No Content Update C [15:0] ADS8528 ADS8548 ADS8568 www.ti.com Figure 38 illustrates Content Update C[31:0] Update C C [31:16] [15:0] Copyright © 2011, Texas Instruments Incorporated ...

  • Page 31

    ... SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 CLKOUT BUSY/INT BUSY POL PD_C RANGE_D PD_D Don't care Don't care Don't care ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 Table STBY RANGE_A 17 16 Don't care Don't care ...

  • Page 32

    ... These bits are active in hardware mode. These bits correspond to the settings of the internal reference DACs (compare to the Reference section). Bit D9 is the MSB of the DAC. Default value is 3FFh (2.5V, nom). 32 Product Folder Link(s): Copyright © 2011, Texas Instruments Incorporated ADS8528 ADS8548 ADS8568 www.ti.com ...

  • Page 33

    ... Parallel Interface To use the device with the parallel interface, the PAR/SER pin should be held low. The maximum achievable data throughput rate is 650kSPS for the ADS8528, 600kSPS for the ADS8548, and 510kSPS for the ADS8568 in this case. Access to the ADS8528/48/68 is controlled as illustrated in Serial Interface The serial interface mode is selected by setting the PAR/SER pin high ...

  • Page 34

    ... SCLK SDO_A DCIN_A SDO_B DCIN_B DCIN_C SDO_C DCIN_D SDO_D DVDD DCEN 16-Bit Data CHx1 16-Bit Data CHx0 16-Bit Data ADS85x8 #3 ADS85x8 #2 ADS85x8 #2 ADS8528 ADS8548 ADS8568 www.ti.com ADS85x8 #3 CONVST_A/B/C/D FS SCLK SDO_A DCIN_A SDO_B To DCIN_B Processing DCIN_C SDO_C Unit DCIN_D SDO_D DVDD ...

  • Page 35

    ... FFFFh FFFFh 1111 1000 0000 0000 1110 0000 0000 0000 F800h E000h ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 Table 7. For the ADS8568 0111 1111 1111 1111 7FFFh 0000 0000 0000 0000 ...

  • Page 36

    ... When reactivated, the relevant channel pair requires 10ms to fully Same Data (Reread Old Data Old Data ADS8528 ADS8548 ADS8568 www.ti.com Old Data (Reread) (1) Copyright © 2011, Texas Instruments Incorporated ...

  • Page 37

    ... ADS8528, 375kSPS for the ADS8548, and 330kSPS for the ADS8568 in serial interface mode. In parallel mode, the maximum data rates are 510kSPS for the ADS8528, 470kSPS for the ADS8548 and 400kSPS for the ADS8568. If enabled, the internal reference remains active during auto-sleep mode ...

  • Page 38

    ... Product Folder Link(s): APPLICATION INFORMATION 2. For example, at 10kSPS, the external drivers are not necessary if the Figure 44. During PCB layout, care should be taken to ADS8528 ADS8548 ADS8568 www.ti.com Figure 43. In this case, the device is value of 1nF and a F TPS65130 Copyright © ...

  • Page 39

    ... REFDN DGND REFDP CH_D0 C F AGND C F CH_D1 AVDD 6x 0 AGND ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 Host Controller DVDD AVDD DVDD AGND AGND DGND AGND AGND HVSS DGND AGND ...

  • Page 40

    ... ADS8528/48/68 along with the proper decoupling and reference capacitors placement and connections. The layout recommendation takes into account the actual size of the components used. 40 Product Folder Link(s): Copyright © 2011, Texas Instruments Incorporated ADS8528 ADS8548 ADS8568 www.ti.com ...

  • Page 41

    ... 0. Figure 44. Layout Recommendation ADS8528 ADS8548 ADS8568 ADS8528 ADS8548 ADS8568 SBAS543A – AUGUST 2011 – REVISED OCTOBER 2011 HVDD HVDD R F CH_A1 C F REFAN AVDD AGND ...

  • Page 42

    ... NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (August 2011) to Revision A • Deleted INL column from Family/Ordering Information table ............................................................................................... • Changed DC Accuracy, INL parameter in ADS8568 Electical Chatacteristics table ............................................................ 42 Product Folder Link(s): REVISION HISTORY Copyright © 2011, Texas Instruments Incorporated ADS8528 ADS8548 ADS8568 www ...

  • Page 43

    ... LQFP ADS8568SPMR ACTIVE LQFP ADS8568SRGCR ACTIVE VQFN ADS8568SRGCT ACTIVE VQFN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. ...

  • Page 44

    Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be ...

  • Page 45

    ... Drawing ADS8528SPMR LQFP PM ADS8528SRGCR VQFN RGC ADS8528SRGCT VQFN RGC ADS8548SPMR LQFP PM ADS8548SRGCR VQFN RGC ADS8548SRGCT VQFN RGC ADS8568SPMR LQFP PM ADS8568SRGCR VQFN RGC ADS8568SRGCT VQFN RGC PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 64 1000 330.0 24.4 13.0 64 2000 330.0 16.4 9.3 64 250 180 ...

  • Page 46

    ... Device Package Type ADS8528SPMR LQFP ADS8528SRGCR VQFN ADS8528SRGCT VQFN ADS8548SPMR LQFP ADS8548SRGCR VQFN ADS8548SRGCT VQFN ADS8568SPMR LQFP ADS8568SRGCR VQFN ADS8568SRGCT VQFN PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 1000 RGC 64 2000 RGC 64 250 PM 64 1000 RGC ...

  • Page 47

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  • Page 48

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  • Page 50

    PM (S-PQFP-G64) 0, 7,50 TYP 10,20 SQ 9,80 12,20 SQ 11,80 1,45 1,35 1,60 MAX NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC ...

  • Page 51

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...