The DAC1220 is a 20-bit digital-to-analog (D/A) converter offering 20-bit monotonic performance over the specified temperature range

DAC1220

Manufacturer Part NumberDAC1220
DescriptionThe DAC1220 is a 20-bit digital-to-analog (D/A) converter offering 20-bit monotonic performance over the specified temperature range
ManufacturerTexas Instruments
DAC1220 datasheet
 


Specifications of DAC1220

Resolution(bits)20Dac: Channels1
InterfaceSerial SPIOutput TypeVoltage
Output Range Max.(v Or Ma)5.5Settling Time(µs)10000
Reference: TypeExtPower Consumption(typ)(mw)2.5
Dnl(max)(+/-lsb)1Inl(max)(+/-lsb)1
Pin/package16SSOP/QSOP  
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FEATURES
1
20-Bit Monotonicity Ensured Over –40°C to
2
+85°C
Low Power: 2.5mW
Voltage Output
Settling Time: 2ms to 0.012%
Maximum Linearity Error: ±0.0015%
On-Chip Calibration
APPLICATIONS
Process Control
ATE Pin Electronics
Closed-Loop Servo Control
Smart Transmitters
Portable Instruments
X
IN
Clock Generator
Microcontroller
Instruction Register
Command Register
Data Register
Offset Register
Full−Scale Register
Serial
SDIO
Interface
SCLK
CS
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
20-Bit, Low-Power
Digital-to-Analog Converter
Check for Samples:
DAC1220
DESCRIPTION
The DAC1220 is a 20-bit digital-to-analog (D/A)
converter offering 20-bit monotonic performance over
the
specified
delta-sigma technology to achieve inherently linear
performance in a small package at very low power.
The resolution of the device can be programmed to
20 bits for Full-Scale, settling to 0.003% within 15ms
typical, or 16 bits for Full-Scale, settling to 0.012%
within 2ms max. The output range is two times the
external
circuitry dramatically reduces low offset and gain
errors.
The
DAC1220
interface; in single-converter applications, the serial
interface can be accomplished with just two wires,
allowing low-cost isolation. For multiple converters, a
CS signal allows for selection of the appropriate D/A
converter.
The DAC1220 has been designed for closed-loop
control applications in the industrial process control
market and high-resolution applications in the test
and measurement market. It is also ideal for remote
applications,
isolated systems. The DAC1220 is available in an
SSOP-16 package.
X
V
OUT
REF
2nd−Order
1st−Order
Switched
Modulator
Capacitor Filter
Modulator Control
DV
DGND
DD
SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009
temperature
range.
It
reference
voltage.
On-chip
features
a
synchronous
battery-powered
instruments,
AV
AGND
DD
C
1
2nd−Order
Continuous
V
OUT
Time Post Filter
C
2
Copyright © 1998–2009, Texas Instruments Incorporated
DAC1220
utilizes
calibration
serial
and

DAC1220 Summary of contents

  • Page 1

    ... The DAC1220 has been designed for closed-loop control applications in the industrial process control market and high-resolution applications in the test and measurement market also ideal for remote applications, isolated systems. The DAC1220 is available in an SSOP-16 package OUT REF 2nd−Order 1st− ...

  • Page 2

    ... DAC1220 ±0.3 –0 –0 ±0.3 +2.0 to +3.0 –0 0.3 DD –0 0 max – θ +150 SSOP-16 200 +300 Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): DAC1220 www.ti.com UNIT °C °C/W °C ...

  • Page 3

    ... I = –0.8mA 3 1.6mA OL 0.5 Offset binary two's complement User-programmable 4.75 20-bit mode = 10nF 3.3nF Product Folder Link(s): DAC1220 DAC1220 DAC1220E MIN TYP MAX UNIT 16 Bits 20 Bits (1) ±15 ppm of FSR ±60 ppm of FSR 1 ppm/°C ±15 ppm of FSR 1 ppm/°C ±150 ...

  • Page 4

    ... Filter capacitor (see text) Analog output voltage Reference input Analog ground Chip-select input Serial data input/output Clock input for serial data transfer Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): DAC1220 www.ti.com DAC1220E TYP MAX UNIT 140 μA 2.5 3.5 mW 3.0 mW ...

  • Page 5

    ... XIN REF 1 specified. LARGE-SIGNAL SETTLING TIME 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0 10k 100k 1M 0 10k Product Folder Link(s): DAC1220 DAC1220 Time (ms) Figure 2. LINEARITY ERROR vs CODE −40 C +25 C +85 C 20k 30k 40k 50k 60k 70k Code Figure 4. Submit Documentation Feedback 5 ...

  • Page 6

    ... This behavior can be disabled. An onboard self-calibration facility compensates for internal offset and gain errors. Calibration values may be stored and loaded externally if desired. The DAC1220 can be put into a sleep mode, in which power consumption is cut by approximately 0 ...

  • Page 7

    ... Rate limiting can be – done with resistance or even an RC filter. DD can be DD Clock Oscillator The DAC1220 has a built-in crystal oscillator at pins X and use it, connect a crystal and load IN OUT capacitors as shown in 12pF load capacitors are shown in the schematic, but the correct value depends mainly on the crystal and layout, and not on the oscillator itself ...

  • Page 8

    ... DAC1220 from being shared with other SPI devices or placed on an SPI bus, which may run much faster. If the DAC1220 is placed on a shared SPI bus, the chip-select line must be controlled; otherwise, it can be grounded. Although the SDIO line is bidirectional, it can be operated as an input only, as long as no register reads are performed ...

  • Page 9

    ... Timing The serial interface is synchronous and controlled by the SCLK input. The DAC1220 latches incoming bits on the falling edge of SCLK, and shifts outgoing bits on the rising edge of SCLK. An external interface should shift outgoing bits on the rising edge of SCLK, and latch incoming bits on the falling edge of SCLK. The relevant ...

  • Page 10

    ... IN0 OUT MSB t 9 SDIO is an input MIN 13 × t XIN 11 × t XIN 8 × t XIN 4 × t XIN 41 × t XIN 22 × t XIN Product Folder Link(s): DAC1220 www.ti.com t 14 IN1 IN0 IN7 OUT1 OUT0 IN7 IN1 IN0 IN7 OUT1 OUT0 IN7 ...

  • Page 11

    ... If these are violated, the DAC1220 may malfunction. The serial interface is byte-oriented. All data is transferred in groups of eight bits. I/O Recovery The DAC1220 has a timeout on the serial interface 2.5MHz, the timeout is approximately 100ms. CLK At 2.5MHz command is interrupted, and no activity occurs on the SCLK or CS lines for 100ms, the DAC1220 will cancel the command ...

  • Page 12

    ... ADR 12 Submit Documentation Feedback 2009...................................................................................................................................... PROGRAMMING Registers There are four registers in the DAC1220, as shown in the register map in (DIR) and the two calibration registers are 24 bits in length, and the Command Register (CMR), which contains configuration bits bits in length. Table 6, Modes 7 ...

  • Page 13

    ... See the Calibration After calibration, the DAC1220 returns to Normal mode. The DAC1220 is ready to accept data once Normal mode, but calibration or the use of saved calibration values is highly recommended. Calibration Calibration is governed by two registers. The Offset ...

  • Page 14

    ... DAC1220 SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER Setting the Output Voltage To set the DAC1220 output voltage, write a code to the Data Input Register (DIR). A write to any of the bytes in the DIR causes the voltage to change at the completion of the write command. The DAC1220 operates in either 16- or 20-bit mode. ...

  • Page 15

    ... Disabled space Command Register (CMR) The command register contains the configuration bits of the DAC1220 shown in command register are shown in Table Writes to the CMR take effect at the negative edge of SCLK during the last bit of the last byte of the write command. ...

  • Page 16

    ... Writing '1' to this bit and switching to Normal mode at the same time will reset the data register. The actual voltage that the DAC1220 will output on setting this bit depends on the data format selected by DF zero gives 0V zero gives V (mid-scale) ...

  • Page 17

    ... Copyright © 1998–2009, Texas Instruments Incorporated SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009 Selects the order in which bits are shifted in and out of the DAC1220, except when writing to the command register. The command register is always written to MSB first. Reads from the command register are according to this bit. ...

  • Page 18

    ... Software Considerations A key to communicating successfully with the DAC1220 is observing the delays in the interface timing diagrams. A violation of these delays, at best, results in lack of correct output; at worse, violating the delays can corrupt communications entirely. ...

  • Page 19

    ... Isolation The DAC1220 serial interface allows for connection using as few as two wires. This is an advantage when galvanic isolation is required. An example isolated connection is shown in chip-select is unused and therefore grounded, and the DAC1220 is being operated unidirectionally. DAC1220 Revisions As of this writing, there have been two released revisions of the DAC1220 ...

  • Page 20

    ... Changes from Revision E (December 2007) to Revision F • Updated device graphic to TI logo ........................................................................................................................................ • Changed description of the 01b row in the 1-0 bits section of 20 Submit Documentation Feedback 2009...................................................................................................................................... REVISION HISTORY ................................................................................................. ............................................................................................ Table 13 ............................................................................ Copyright © 1998–2009, Texas Instruments Incorporated Product Folder Link(s): DAC1220 www.ti.com Page 10 Page 1 16 ...

  • Page 21

    ... SSOP/QSOP DAC1220E/2K5 ACTIVE SSOP/QSOP DAC1220E/2K5G4 ACTIVE SSOP/QSOP DAC1220EG4 ACTIVE SSOP/QSOP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. ...

  • Page 22

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing DAC1220E/2K5 SSOP/ DBQ QSOP PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 16 2500 330.0 12.4 6.4 Pack Materials-Page 1 21-Sep-2009 Pin1 (mm) (mm) (mm) (mm) Quadrant 5 ...

  • Page 23

    ... Device Package Type DAC1220E/2K5 SSOP/QSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) DBQ 16 2500 Pack Materials-Page 2 21-Sep-2009 Width (mm) Height (mm) 346.0 346.0 29.0 ...

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  • Page 26

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...