The UCC28070 is an advanced power factor correction device that integrates two pulse-width modulators (PWMs) operating 180° out of phase

UCC28070

Manufacturer Part NumberUCC28070
DescriptionThe UCC28070 is an advanced power factor correction device that integrates two pulse-width modulators (PWMs) operating 180° out of phase
ManufacturerTexas Instruments
UCC28070 datasheet
 


Specifications of UCC28070

Uvlo Thresholds On/off(v)10.2/9.2Operating Supply(max)(v)21
Startup Current(ma)20Operating Supply Current(ma)20
Vref(v)6Vref Tol(%)3
Duty Cycle(max)(%)99Practical Operating Frequency(max)(mhz)0.3
Pin/package20SOIC, 20TSSOP  
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Interleaving Continuous Conduction Mode PFC Controller
FEATURES
1
Interleaved Average Current-Mode PWM
Control with Inherent Current Matching
Advanced Current Synthesizer Current
Sensing for Superior Efficiency
Highly-Linear Multiplier Output with Internal
Quantized Voltage Feed-Forward Correction
for Near-Unity PF
Programmable Frequency (30 kHz to 300 kHz)
Programmable Maximum Duty-Cycle Clamp
Programmable Frequency Dithering Rate and
Magnitude for Enhanced EMI Reduction
– Magnitude: 3 kHz to 30 kHz
– Rate: Up to 30 kHz
External Clock Synchronization Capability
Enhanced Load and Line Transient Response
through Voltage Amplifier Output Slew-Rate
Correction
Programmable Peak Current Limiting
Bias-Supply UVLO, Over-Voltage Protection,
Open-Loop Detection, and PFC-Enable
Monitoring
External PFC-Disable Interface
Open-Circuit Protection on VSENSE and
VINAC pins
Programmable Soft Start
20-Lead TSSOP/SOIC Packages
V
IN
R
A
R
B
From Ixfrms
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Check for Samples:
UCC28070
APPLICATIONS
High-Efficiency Server and Desktop Power
Supplies
Telecom Rectifiers
White Goods and Industrial Equipment
DESCRIPTION
The UCC28070 is an advanced power factor
correction device that integrates two pulse-width
modulators (PWMs) operating 180° out of phase.
This
interleaved
substantial reduction in the input and output ripple
currents, and the conducted-EMI filtering becomes
easier and less expensive. A significantly improved
multiplier design provides a shared current reference
to two independent current amplifiers that ensures
matched average current mode control in both PWM
outputs while maintaining a stable, low-distortion
sinusoidal input line current.
The
UCC28070
including current synthesis and quantized voltage
feed-forward to promote performance enhancements
in PF, efficiency, THD, and transient response.
Features
synchronization, and slew rate enhancement further
expand the potential performance enhancements.
The UCC28070 also contains a variety of protection
features including output over-voltage detection,
programmable
lockout, and open-loop protection.
Simplified Application Diagram
12V to 21V
To CSB
C
CDR
1
CDR
DMAX
20
R
DMX
R
2
RDM
RT
19
RDM
R
RT
3
VAO
SS
18
C
SS
4
VSENSE
GDB
17
5
VINAC
GND
16
R
IMO
6
IMO
VCC
15
R
SYN
7
RSYNTH
GDA
14
8
CSB
VREF
13
9
CSA
CAOA
12
To CSA
10
PKLMT
CAOB
11
C
C
C
R
ZV
ZC
ZC
PK1
C
REF
C
C
C
PV
PC
PC
R
PK2
R
R
R
ZV
ZC
ZC
UCC28070
SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011
PWM
operation
generates
contains
multiple
innovations
including
frequency
dithering,
peak-current
limit,
under-voltage
L1
D1
V
OUT
C
OUT
T1
R
S
M1
L2
D2
R
T2
S
R
A
M2
R
B
Copyright © 2007–2011, Texas Instruments Incorporated
clock

UCC28070 Summary of contents

  • Page 1

    ... PF, efficiency, THD, and transient response. Features synchronization, and slew rate enhancement further expand the potential performance enhancements. The UCC28070 also contains a variety of protection features including output over-voltage detection, programmable lockout, and open-loop protection. Simplified Application Diagram ...

  • Page 2

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 PART NUMBER UCC28070PW UCC28070PWR UCC28070DW UCC28070DWR ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) PARAMETER Supply voltage: VCC Supply current: I VCC Voltage: GDA, GDB Gate drive current – continuous: GDA, GDB Gate drive current – ...

  • Page 3

    ... THERMAL IMPEDANCE T = 25°C POWER A JUNCTION-TO-AMBIENT RATING (1) (2) 125 °C/Watt and 800 mW (1) (2) 95 °C/Watt and 1050 mW UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 UNIT 85°C POWER RATING A (1) (1) 320 mW (1) (1) 420 mW MIN MAX UNIT ...

  • Page 4

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 ELECTRICAL CHARACTERISTICS over operating free-air temperature range −40°C < T kΩ 100 kΩ 2.2 nF, C RDM SYN CDR SYMBOL PARAMETER Bias Supply (1) VCC VCC shunt voltage SHUNT VCC current, disabled VCC current, enabled ...

  • Page 5

    ... Measured as VSENSE (falling) / VSENSE (regulation) Measured at VSENSE (rising) Measured at VAO, in addition to VAO source current. Measured at SS (rising) VSENSE = 0.5 V, VAO = 1 V VSENSE = 0 VSENSE = 2 Measured as VSENSE – SS VSENSE = 0 0.2 V UCC28070 = 75 kΩ 68.1 RT DMX = 0 mA (unless otherwise noted) MIN TYP MAX UNITS 5 5 ...

  • Page 6

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range −40°C < T kΩ 100 kΩ 2.2 nF, C RDM SYN CDR SYMBOL PARAMETER Over Voltage V OVP threshold OVP OVP hysteresis OVP propagation delay Zero-Power ...

  • Page 7

    ... A RT VCC = LOAD LOAD LOAD LOAD LOAD VCC = 2.5 mA GDA GDB UCC28070 = 75 kΩ 68.1 RT DMX = 0 mA (unless otherwise noted) MIN TYP MAX UNITS 2.91 3 3.09 0.10 0.15 0. 5.25 0.250 0.500 μA 3 ...

  • Page 8

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 SOIC-20 Top View, DW Package TSSOP-20 Top View, PW Package CDR 1 RDM 2 VAO 3 VSENSE 4 VINAC 5 IMO 6 RSYNTH 7 CSB 8 CSA 9 PKLMT 10 NAME PIN # I/O Dither Rate Capacitor. Frequency-dithering timing pin. An external capacitor to GND programs CDR 1 I the rate of oscillator dither. Connect the CDR pin to the VREF pin to disable dithering. ...

  • Page 9

    ... DMAX 20 I sets the PWM maximum duty-cycle based on the ratio of R Copyright © 2007–2011, Texas Instruments Incorporated TERMINAL FUNCTIONS (continued) DESCRIPTION until UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 exceeds 3 V. Upon recovery from certain fault /R . DMX RT 9 ...

  • Page 10

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 VCC 15 + Linear VREF 13 Regulator 8V GND 16 10. Oscillator Freq. Dither RDM / SYNC 2 Logic SYNC SYNC Dither 1 + CDR Enable Disable 5V 10 PKLM T IpeakA + IpeakB CSA 9 + CSB 8 Current Synthesizer RSYNTH 7 Disable ...

  • Page 11

    ... C 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0. 100 120 140 - UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 REFERENCE VOLTAGE vs TEMPERATURE VREF ( mA) VREF - Temperature - C J Figure 2. I BIAS CURRENT VSENSE vs TEMPERATURE - Temperature - C J Figure 4. ...

  • Page 12

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 TYPICAL CHARACTERISTICS (continued) MULTIPLIER OUTPUT CURRENT vs VOLTAGE AMPLIFIER OUTPUT 180 QVFF Level 160 Level 1 Level 2 140 Level 3 120 Level 4 Level 5 100 Level 6 80 Level 7 Level VAO - Voltage Amplifier Output - V Figure 5 ...

  • Page 13

    ... VOLTAGE AMPLIFIER TRANSFER FUNCTION -20 -40 -60 -80 -100 -120 -140 60 80 100 120 140 2.5 2 CURRENT AMPLIFIER TRANSCONDUCTANCE vs TEMPERATURE -60 -40 - Temperature - C J Figure 11. UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 vs VSENSE 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 VSENSE - V Figure 10. 100 120 140 3.5 13 ...

  • Page 14

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 TYPICAL CHARACTERISTICS (continued) CAx INPUT OFFSET VOLTAGE vs TEMPERATURE (at 0.8 V common mode) 5 CAx + CAx AVG -10 CAx -3s -15 -20 -60 -40 - Temperature - J Figure 12. CAx INPUT OFFSET VOLTAGE vs TEMPERATURE (at 2.0 V common mode CAx +3s ...

  • Page 15

    ... Copyright © 2007–2011, Texas Instruments Incorporated TEMPERATURE (at 3.6 V common mode -10 - 100 120 140 -60 - UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 CA1 TO CA2 RELATIVE OFFSET vs A-B +3s A-B AVG A-B -3s - 100 120 Temperature - ...

  • Page 16

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 THEORY OF OPERATION Interleaving One of the main benefits from the 180° interleaving of phases is significant reductions in the high-frequency ripple components of both the input current and the current into the output capacitor of the PFC pre-regulator. ...

  • Page 17

    ... Programming the PWM Frequency and Maximum Duty-Cycle Clamp The PWM frequency and maximum duty-cycle clamps for both GDx outputs of the UCC28070 are set through the selection of the resistors connected to the RT and DMAX pins, respectively. The selection of the RT resistor (R ) directly sets the PWM frequency (f ...

  • Page 18

    ... SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 External Clock Synchronization The UCC28070 has also been designed to be easily synchronized to almost any external frequency source. By disabling frequency dithering (pulling CDR > 5 V), the UCC28070’s SYNC circuitry is enabled permitting the internal oscillator to be synchronized with pulses presented on the RDM pin. In order to ensure a precise 180 ...

  • Page 19

    ... VSENSE and VINAC Open Circuit Protection Both the VSENSE and VINAC pins have been designed with an internal 250-nA current sink to ensure that in the event of an open circuit at either pin, the voltage is not left undefined, and the UCC28070 remains in a “safe” operating mode. ...

  • Page 20

    ... CSB1 From Ixfrms CSA1 Vin CSB2 From Ixfrms CSA2 Synchronized Clocks o w/ 180 Phase Shift Figure 18. Simplified Four-Phase Application Diagram Using Two UCC28070 DMX 1 CDR DMAX 20 2 RDM VAO VSENSE GDB ...

  • Page 21

    ... Meanwhile, the continuous monitoring of the input and output voltage via the VINAC and VSENSE pins permits the UCC28070 to internally recreate the inductor current’s down-slope during each output’s respective off-time. Through the selection of the RSYNTH ...

  • Page 22

    ... SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 Programmable Peak Current Limit The UCC28070 has been designed with a programmable cycle-by-cycle peak current limit dedicated to disabling either GDA or GDB output whenever the corresponding current-sense input (CSA or CSB respectively) rises above the voltage established on the PKLMT pin. Once an output has been disabled via the detection of peak current limit, the output remains disabled until the next clock cycle initiates a new PWM period ...

  • Page 23

    ... Linear Multiplier The multiplier of the UCC28070 generates a reference current which represents the desired wave shape and proportional amplitude of the ac input current. This current is converted to a reference voltage signal by the R resistor, which is scaled in value to match the voltage of the current-sense signals. The instantaneous multiplier ...

  • Page 24

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 The multiplier output current I for any line and load condition can thus be determined by the equation IMO ( ) ( m ´ ´ VINAC VAO I = IMO k VFF Because the k value represents the scaled V VFF downwards when VINAC ...

  • Page 25

    ... PKLMT threshold, the full variation of maximum input power will be seen, but the input currents will inherently be below the maximum acceptable current levels of the power stage. The performance of the multiplier in the UCC28070 has been significantly enhanced when compared to previous generation PFC controllers, with high linearity and accuracy over most of the input ranges. The accuracy is at its ...

  • Page 26

    ... Voltage Biasing (VCC and VREF) The UCC28070 operates within a VCC bias supply range Under-Voltage Lock-Out (UVLO) threshold prevents the PFC from activating until VCC > 10.2 V, and hysteresis assures reliable start-up from a possibly low-compliance bias source ...

  • Page 27

    ... Adaptive Soft Start In order to maintain a controlled power up, the UCC28070 has been designed with an adaptive soft-start function that overrides the internal reference voltage with a controlled voltage ramp during power up. On initial power up, once V exceeds the 0.75-V enable threshold (V VSENSE the 1.5-mA adaptive soft-start current source is activated. This 1.5-mA pull-up almost immediately pulls the SS pin to 0 ...

  • Page 28

    ... SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 PFC Start-Up Hold Off An additional feature designed into the UCC28070 is the “Start-Up Hold Off” logic that prevents the device from initiating a soft-start cycle until the VAO is below the zero-power threshold (0.75 V). This feature ensures that the SS cycle will initiate from zero-power and zero duty-cycle while preventing the potential for any significant inrush currents due to stored charge in the VAO compensation network ...

  • Page 29

    ... Current Loop Compensation The UCC28070 incorporates two identical and independent transconductance-type current-error amplifiers (one for each phase) with which to control the shaping of the PFC input current waveform. The current-error amplifier (CA) forms the heart of the embedded current control loop of the boost PFC pre-regulator, and is compensated for loop stability using familiar principles [4, 5] ...

  • Page 30

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 The switching ripple voltage should be attenuated to less than 1/10 of the ΔV considered “negligible” ripple. Thus, CAOx gain at f is: PWM D ´ RMP SYNC 10 g Rzc £ ´ where ∆I ...

  • Page 31

    ... For every 1% of 3rd-harmonic input distortion allowable, the small-signal gain G frequency should allow no more than 2% ripple over the full VAO voltage range. In the UCC28070, V range from zero load power to ~4.2 V(see note below) at full load power for a Δ 64-mV peak ripple ...

  • Page 32

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 The output capacitor maximum low-frequency zero-to-peak ripple voltage is closely approximated by: Pin X ´ avg Cout Vout Vout ´ avg avg where P is the total maximum input power of the interleaved-PFC pre-regulator, V IN(avg) output voltage and C is the output capacitance ...

  • Page 33

    ... These two current signals are summed together to form the entire inductor current, but this is not the case for the UCC28070. A major advantage of the UCC28070 design is the current synthesis function, which internally recreates the inductor current down-slope during the switching period off-time. This eliminates the need for the diode-leg CT in each phase, significantly reducing space, cost and complexity ...

  • Page 34

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 In general, 50 ≤ N ≤ 200 is a reasonable range from which to choose power loss in R and insufficient L S winding is assumed Figure 24. Current Sense Transformer Equivalent Circuit A major contributor to distortion of the input current is the effect of magnetizing current on the CT output signal (i ) ...

  • Page 35

    ... In order to accommodate various CT circuit designs and prevent the potentially destructive result due to CT saturation, the UCC28070’s maximum duty-cycle needs to be programmed such that the resulting minimum off-time accomplishes the required worst-case reset. (See the PWM Frequency and Duty-Cycle Clamp section of ...

  • Page 36

    ... Current Sense Offset and PWM Ramp for Improved Noise Immunity To improve noise immunity at extremely light loads, a PWM ramp with a dc offset is recommended to be added to the current sense signals. Electrical components R C form a PWM ramp that is activated and deactivated by the gate drive outputs of the UCC28070. Resistor TB R and R ...

  • Page 37

    ... Copyright © 2007–2011, Texas Instruments Incorporated NOTE Figure 27. False Current Sense Signal and and OFF UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 to ensure that when the unit goes OB ) less the offset can then be S (35) (36) (37) (38) 37 ...

  • Page 38

    ... UCC28070 SLUS794E – NOVEMBER 2007 – REVISED APRIL 2011 Recommended PCB Device Layout Interleaved PFC techniques dramatically reduce input and output ripple current caused by the PFC boost inductor, which allows the circuit to use smaller and less expensive filters. To maximize the benefits of interleaving, the output filter capacitor should be located after the two phases allowing the current of each phase to be combined together before entering the boost capacitor ...

  • Page 39

    ... UCC28070DWR ACTIVE SOIC UCC28070PW ACTIVE TSSOP UCC28070PWG4 ACTIVE TSSOP UCC28070PWR ACTIVE TSSOP UCC28070PWRG4 ACTIVE TSSOP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 40

    ... In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold Customer on an annual basis. OTHER QUALIFIED VERSIONS OF UCC28070 : Automotive: UCC28070-Q1 • NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects ...

  • Page 41

    ... TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing UCC28070DWR SOIC DW UCC28070PWR TSSOP PW PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 20 2000 330.0 24.4 10.8 20 2000 330.0 16.4 6.95 Pack Materials-Page 1 5-May-2011 Pin1 (mm) ...

  • Page 42

    ... Device Package Type UCC28070DWR SOIC UCC28070PWR TSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 2000 PW 20 2000 Pack Materials-Page 2 5-May-2011 Width (mm) Height (mm) 346.0 346.0 41.0 346.0 346.0 33.0 ...

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  • Page 46

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...