TPS71719

Manufacturer Part NumberTPS71719
DescriptionThe TPS717xx family of low-dropout (LDO), low-power linear regulators offers very high power supply rejection (PSRR) while maintaining very low 45µA ground current in an ultra-small, five-pin SC70 package
ManufacturerTexas Instruments
TPS71719 datasheet
 


Specifications of TPS71719

Iout(max)(a)0.1Vdo(typ)(mv)170
Iq(typ)(ma)0.05Vin(min)(v)2.5
Vin(max)(v)6.5Vout Adj(min)(v)1.9
Vout Adj(max)(v)1.9Accuracy(%)3
Output Capacitor TypeCeramicFixed Output Options(v)1.9
Vout(min)(v)1.9Vout(max)(v)1.9
Pin/package5SC70Regulated Outputs(#)1
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TPS717xx
SBVS068G – FEBRUARY 2006 – REVISED APRIL
2009..................................................................................................................................................
Output Noise
In most LDOs, the bandgap is the dominant noise
source. If a noise reduction capacitor (C
with the TPS717xx, the bandgap does not contribute
significantly to noise. Instead, noise is dominated by
the output resistor divider and the error amplifier
input. To minimize noise in a given application, use a
0.01 F (minimum) noise reduction capacitor; for the
adjustable version, smaller value resistors in the
output resistor divider reduce noise. A parallel
combination that gives 2.5 A of divider current has
the same noise performance as a fixed voltage
version.
Equation 2 approximates the total noise referred to
the feedback point (FB pin) when C
noise is approximately given by
Equation
mV
RMS
V =
11.5
x V
N
OUT
V
Board Layout Recommendations to Improve
PSRR and Noise Performance
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that
the board be designed with separate ground planes
for V
and V
, with each ground plane connected
IN
OUT
only at the GND pin of the device. In addition, the
ground connection for the bypass capacitor should
connect directly to the GND pin of the device.
Internal Current Limit
The TPS717xx internal current limit helps protect the
regulator during fault conditions. During current limit,
the output sources a fixed amount of current that is
largely independent of output voltage. For reliable
operation, the device should not be operated in a
current limit state for extended periods of time.
The PMOS pass element in the TPS717xx has a
built-in body diode that conducts current when the
voltage at OUT exceeds the voltage at IN. This
current is not limited, so if extended reverse voltage
operation is anticipated, external limiting may be
appropriate.
Shutdown
The enable pin (EN) is active high and is compatible
with standard and low voltage, TTL-CMOS levels.
When shutdown capability is not required, EN can be
connected to IN.
12
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Dropout Voltage
The TPS717xx uses a PMOS pass transistor to
) is used
achieve low dropout. When (V
NR
the dropout voltage (V
in its linear region of operation and the input-to-output
resistance is the R
V
will approximately scale with output current
DO
because the PMOS device behaves like a resistor in
dropout.
As with any linear regulator, PSRR and transient
response are degraded as (V
dropout. This effect is shown in
Figure 23
in the
= 0.01 F, total
Startup
NR
2:
Fixed voltage versions of the TPS717xx use a
quick-start circuit to fast-charge the noise reduction
capacitor, C
(2)
Diagrams,
combination of very low output noise and fast start-up
times. The NR pin is high impedance, so a low
leakage C
NR
capacitors are appropriate in this configuration.
Note that for fastest startup, V
first, then the enable pin (EN) driven high. If EN is
tied to IN, startup will be somewhat slower. Refer to
Figure 31
in the
quick-start switch is closed for approximately 135 s.
To ensure that C
quick-start time, a 0.01 F or smaller capacitor should
be used.
For output voltages below 1.6V, a voltage divider on
the bandgap reference voltage is employed to
optimize output regulation performance for lower
output voltages. This configuration results in an
additional resistor in the quick-start path and
combined with the noise reduction capacitor (C
results in slower start-up times for output voltages
below 1.6V.
Equation 3
function of C
t
= 160 s + (540
START
Transient Response
As with any regulator, increasing the size of the
output capacitor reduces over/undershoot magnitude
but increases duration of the transient response.
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– V
) is less than
IN
OUT
), the PMOS pass device is
DO
of the PMOS pass element.
DS(ON)
– V
) approaches
IN
OUT
Figure 21
through
Typical Characteristics
section.
, if present (see
Functional Block
NR
Figure
1).
This
circuit
allows
capacitor must be used; most ceramic
should be applied
IN
Typical Characteristics
section. The
is fully charged during the
NR
approximates the start-up time as a
for output voltages below 1.6V:
NR
ms
x C
nF s
)
m
m
NR
nF
Copyright © 2006–2009, Texas Instruments Incorporated
the
)
NR
(3)