TPS71719

Manufacturer Part NumberTPS71719
DescriptionThe TPS717xx family of low-dropout (LDO), low-power linear regulators offers very high power supply rejection (PSRR) while maintaining very low 45µA ground current in an ultra-small, five-pin SC70 package
ManufacturerTexas Instruments
TPS71719 datasheet
 


Specifications of TPS71719

Iout(max)(a)0.1Vdo(typ)(mv)170
Iq(typ)(ma)0.05Vin(min)(v)2.5
Vin(max)(v)6.5Vout Adj(min)(v)1.9
Vout Adj(max)(v)1.9Accuracy(%)3
Output Capacitor TypeCeramicFixed Output Options(v)1.9
Vout(min)(v)1.9Vout(max)(v)1.9
Pin/package5SC70Regulated Outputs(#)1
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TPS717xx
SBVS068G – FEBRUARY 2006 – REVISED APRIL
2009..................................................................................................................................................
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCT
TPS717xxyyyz
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Output voltages from 0.9V to 5.0V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted). All voltages are with respect to GND.
PARAMETER
Input voltage range, V
IN
Feedback input voltage range, V
, V
FB
NR
Enable voltage range, V
EN
Output voltage range, V
OUT
Maximum output current, I
OUT
Continuous total power dissipation, P
DISS
Junction temperature range, T
J
Storage junction temperature range, T
STG
ESD rating, HBM
ESD rating, CDM
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) V
absolute maximum rating is V
+ 0.3V or +7.0V, whichever is greater.
EN
IN
DISSIPATION RATINGS
BOARD
PACKAGE
R
JC
(1)
Low-K
DCK
165°C/W
(2)
High-K
DCK
165°C/W
(1)
Low-K
DRV
20°C/W
(2)
High-K
DRV
20°C/W
(2)
High-K
DSE
(1) The JEDEC low-K (1s) board used to derive this data was a 3in × 3in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
Submit Documentation Feedback
(1)
ORDERING INFORMATION
V
XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1)
TPS717xx
–0.3 to +7.0
–0.3 to +3.6
–0.3 to V
–0.3 to +7.0
Internally limited
–55 to +150
–55 to +150
DERATING FACTOR
R
ABOVE T
= +25°C
T
< +25°C
JA
A
A
395°C/W
2.5mW/°C
250mW
315°C/W
3.2mW/°C
320mW
140°C/W
7.1mW/°C
715mW
65°C/W
15.4mW/°C
1540mW
206°C/W
4.85mW/°C
485mW
Copyright © 2006–2009, Texas Instruments Incorporated
www.ti.com
(2)
OUT
UNIT
V
V
(2)
+ 0.3V
V
IN
V
See
Dissipation Ratings
Table
°C
°C
2
kV
500
V
T
= +70°C
T
= +85°C
A
A
140mW
100mW
175mW
130mW
395mW
285mW
845mW
615mW
269mW
194mW