The TPS752xxQ and TPS754xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively

 

TPS75425

Manufacturer Part NumberTPS75425
DescriptionThe TPS752xxQ and TPS754xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively
ManufacturerTexas Instruments
TPS75425 datasheets

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Specifications of TPS75425

Iout(max)(a)2Vdo(typ)(mv)210
Iq(typ)(ma)0.07Vin(min)(v)2.7
Vin(max)(v)5Vout Adj(min)(v)2.5
Vout Adj(max)(v)2.5Accuracy(%)2
Output Capacitor TypeTantalumFixed Output Options(v)2.5
Vout(min)(v)2.5Vout(max)(v)2.5
Pin/package20HTSSOPRegulated Outputs(#)1
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TPS752xxQ with RESET Output, TPS754xxQ with Power Good Output
FAST-TRANSIENT-RESPONSE 2-A LOW-DROPOUT VOLTAGE REGULATORS
FEATURES
1
2-A Low-Dropout Voltage Regulator
23
Available in 1.5 V, 1.8 V, 2.5 V, 3.3 V Fixed
Output and Adjustable Versions
Open Drain Power-On Reset With 100ms Delay
(TPS752xxQ)
Open Drain Power-Good (PG) Status Output
(TPS754xxQ)
Dropout Voltage Typically 210 mV at 2 A
(TPS75233Q)
Ultralow 75-μA Typical Quiescent Current
Fast Transient Response
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
20-Pin TSSOP PowerPAD™ (PWP) Package
Thermal Shutdown Protection
APPLICATIONS
Telecom
Servers
DSP, FPGA Supplies
V
IN
0.22 F
m
(1) See
Application Information
for capacitor selection details.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SLVS242C – MARCH 2000 – REVISED OCTOBER 2007
DESCRIPTION
The TPS752xxQ and TPS754xxQ devices are
low-dropout regulators with integrated power-on reset
and power-good (PG) functions respectively. These
devices are capable of supplying 2 A of output
current with a dropout of 210 mV (TPS75233Q,
TPS75433Q). Quiescent current is 75 μA at full load
and drops down to 1 μA when the device is disabled.
These devices are designed to have fast transient
response for larger load current changes.
Because the PMOS device behaves as a low-value
resistor, the dropout voltage is very low (typically
210 mV at an output current of 2 A for the
TPS75x33Q) and is directly proportional to the output
current. Additionally, because the PMOS pass
element is a voltage-driven device, the quiescent
current is very low and independent of output loading
(typically 75 μA over the full range of output current,
1 mA to 2 A). These two key specifications yield a
significant
improvement
battery-powered systems.
The device is enabled when EN is connected to a
low-level input voltage. This LDO family also features
a sleep mode; applying a TTL high signal to EN
(enable) shuts down the regulator, reducing the
quiescent current to less than 1 μA at T
blank
blank
Typical Application Circuit
(Fixed Voltage Options)
3
6
PG or
IN
RESET
4
7
IN
SENSE
8
OUT
5
9
EN
OUT
C
+
47 F
m
GND
17
Copyright © 2000–2007, Texas Instruments Incorporated
TPS752xxQ
TPS754xxQ
in
operating
life
= +25 C.
J
PG or RESET Output
V
OUT
(1)
OUT
for

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TPS75425 Summary of contents

  • Page 1

    ... Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. 2 All other trademarks are the property of their respective owners. ...

  • Page 2

    ... TSSOP (PWP) package. blank This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications ...

  • Page 3

    ... Output voltage range OUT I Output current OUT T Operating virtual junction temperature J (1) To calculate the minimum input voltage for your maximum output current, use the following equation: V Copyright © 2000–2007, Texas Instruments Incorporated DERATING FACTOR T < +25 C ABOVE ...

  • Page 4

    ... RMS 210 400 mV 3.3 4.5 A +150 μA –1 1 μ 0 1 OUT 0.5 %V OUT 0.15 0 μA 100 ms 1.1 1 OUT 0.5 %V OUT 0.15 0 μA –1 1 μA – Copyright © 2000–2007, Texas Instruments Incorporated ...

  • Page 5

    ... 1.1834 V ref 1.1834 V ref Copyright © 2000–2007, Texas Instruments Incorporated FUNCTIONAL BLOCK DIAGRAMS Adjustable Voltage Versions + 100 ms Delay (for RESET Option) _ GND Fixed-Voltage Versions + 100 ms Delay (for RESET Option) _ GND TPS752xxQ TPS754xxQ SLVS242C – MARCH 2000 – REVISED OCTOBER 2007 ...

  • Page 6

    ... Not internally connected on adjustable versions. Sense input for fixed options. Ground Ground/heatsink I Input voltage Not connected O Regulated output voltage TPS752xxQ devices only; open-drain RESET output. O TPS754xxQ devices only; open-drain power-good (PG) output. www.ti.com DESCRIPTION Copyright © 2000–2007, Texas Instruments Incorporated ...

  • Page 7

    ... Power Good. The symbol V PG standards for semiconductor symbology. ( Trip voltage is typically 17% lower than the output voltage (83 Copyright © 2000–2007, Texas Instruments Incorporated TPS752xxQ RESET Timing Diagram (2) V IT+ Less than 5% of the ...

  • Page 8

    ... Dropout Voltage vs Junction Temperature Input Voltage (Min) vs Output Voltage vs Output Current www.ti.com FIGURE NO. Figure 3, Figure 4 Figure 5, Figure 6 vs Time Figure 18 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14, Figure 16 Figure 15, Figure 17 Figure 20, Figure 21 Copyright © 2000–2007, Texas Instruments Incorporated ...

  • Page 9

    ... OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 3.37 3.35 3. 3.31 3.29 3.27 3.25 3. -50 T Junction Temperature - J Figure 5. Copyright © 2000–2007, Texas Instruments Incorporated TYPICAL CHARACTERISTICS = – +125 C) unless otherwise noted. Typical values are 1.503 1.502 1.501 1.500 1.499 1.498 1.497 1500 2000 ...

  • Page 10

    ... F m OUT OUT T = +25 C ° J 100 1k 10k 100k 1M f Frequency Figure 8. TPS75x33Q OUTPUT IMPEDANCE vs FREQUENCY C = 100 F m OUT OUT C = 100 F m OUT OUT 100 1k 10k 100k 1M f Frequency Figure 10. Copyright © 2000–2007, Texas Instruments Incorporated 10M 10M ...

  • Page 11

    ... Figure 11. INPUT VOLTAGE (MIN) vs OUTPUT VOLTAGE 4 OUT T = +25 C ° +125 C ° A 3.0 2.7 2.0 1.5 1.75 2 2.25 2.5 V Output Voltage - OUT Figure 13. Copyright © 2000–2007, Texas Instruments Incorporated 300 OUT 250 ° 200 150 100 4 100 0 -100 ° ...

  • Page 12

    ... 3.3 = 100 F (Tantalum + 4 www.ti.com = + TPS75x33Q LINE TRANSIENT RESPONSE = 100 F (Tantalum OUT = 3.3 V OUT 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 t Time Figure 16. TPS75x33QOUTPUT VOLTAGE vs TIME (AT STARTUP) ° 0.2 0.4 0.6 0.8 t Time Figure 18. Copyright © 2000–2007, Texas Instruments Incorporated 1.0 1.0 ...

  • Page 13

    ... I Output Current - OUT Figure 20. (1). Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to C Copyright © 2000–2007, Texas Instruments Incorporated (Figure 20 and Figure To Load + C OUT ...

  • Page 14

    ... The size of this capacitor depends on the output current and response time of the main power supply, as well as the distance to the load (LDO). 14 Submit Documentation Feedback APPLICATION INFORMATION Copyright © 2000–2007, Texas Instruments Incorporated www.ti.com (output of the LDO). When OUT to filter noise is not OUT ...

  • Page 15

    ... LDO output stage Figure 23. LDO Output Stage With Parasitic Resistances ESR and ESL Copyright © 2000–2007, Texas Instruments Incorporated SLVS242C – MARCH 2000 – REVISED OCTOBER 2007 Figure 20 and ...

  • Page 16

    ... From Low-to-High Output Current www.ti.com ) = V ). This condition means that no OUT in Figure 1 now acts OUT = V(C ) – result OUT OUT ESR of the LDO is 1 24. I OUT V OUT ESR 1 ESR 2 ESR Load Step OUT Copyright © 2000–2007, Texas Instruments Incorporated 24). ...

  • Page 17

    ... If the temperature of the device exceeds +150 C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below +130 C (typ), regulator operation resumes. Copyright © 2000–2007, Texas Instruments Incorporated SLVS242C – MARCH 2000 – REVISED OCTOBER 2007 Equation ...

  • Page 18

    ... The PWP package (a thermally-enhanced TSSOP) combines fine-pitch surface-mount technology with thermal performance comparable to much larger power packages. 18 Submit Documentation Feedback , and the actual dissipation, P D(max) Equation 3: Table). Equation 4: DIE (c) Bottom View www.ti.com , which must be less than or D Thermal Pad Copyright © 2000–2007, Texas Instruments Incorporated (3) (4) ...

  • Page 19

    ... PWP package provides independent leads that can be used as inputs and outputs. (Note: leads 1, 10, 11, and 20 are internally connected to the thermal pad and the IC substrate.) 150 100 0.3 Figure 27. Thermal Resistance vs Copper Heatsink Area Copyright © 2000–2007, Texas Instruments Incorporated 2 in Figure 27 Figure 30. Natural Convection 50 ft/min 100 ft/min 150 ft/min ...

  • Page 20

    ... T = +105 C ° A 3.0 2.5 2.0 1.5 150 ft/min 300 ft/min 1.0 Natural Convection 0 0 Copper Heatsink Area cm - (c) www.ti.com T = +55 C ° A 300 ft/min 150 ft/min Natural Convection Copper Heatsink Area - cm (b) 8 Copyright © 2000–2007, Texas Instruments Incorporated 8 ...

  • Page 21

    ... In either case, the above calculations should be repeated with the new system parameters. Copyright © 2000–2007, Texas Instruments Incorporated as a function of heatsink area. A family of curves is included to Board thickness ...

  • Page 22

    ... Submit Documentation Feedback are for soldered connections with voiding between 20% and 50%. The Minimum Recommended Location of Exposed Heatsink Area Thermal Pad on PWP Package Figure 30. PWP Package Land Pattern www.ti.com Copyright © 2000–2007, Texas Instruments Incorporated ...

  • Page 23

    PACKAGING INFORMATION (1) Orderable Device Status TPS75201QPWP ACTIVE TPS75201QPWPG4 ACTIVE TPS75201QPWPR ACTIVE TPS75201QPWPRG4 ACTIVE TPS75215QPWP ACTIVE TPS75215QPWPG4 ACTIVE TPS75215QPWPR ACTIVE TPS75215QPWPRG4 ACTIVE TPS75218QPWP ACTIVE TPS75218QPWPG4 ACTIVE TPS75218QPWPR ACTIVE TPS75218QPWPRG4 ACTIVE TPS75225QPWP ACTIVE TPS75225QPWPG4 ACTIVE TPS75225QPWPR ACTIVE TPS75225QPWPRG4 ACTIVE TPS75233QPWP ...

  • Page 24

    ... ACTIVE TPS75418QPWPG4 ACTIVE TPS75418QPWPR ACTIVE TPS75418QPWPRG4 ACTIVE TPS75425QPWP ACTIVE TPS75425QPWPG4 ACTIVE TPS75425QPWPR ACTIVE TPS75425QPWPRG4 ACTIVE TPS75433QPWP ACTIVE TPS75433QPWPG4 ACTIVE TPS75433QPWPR ACTIVE TPS75433QPWPRG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 25

    TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken ...

  • Page 26

    ... PWP TPS75215QPWPR HTSSOP PWP TPS75218QPWPR HTSSOP PWP TPS75225QPWPR HTSSOP PWP TPS75233QPWPR HTSSOP PWP TPS75401QPWPR HTSSOP PWP TPS75415QPWPR HTSSOP PWP TPS75418QPWPR HTSSOP PWP TPS75425QPWPR HTSSOP PWP TPS75433QPWPR HTSSOP PWP PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 20 2000 330.0 16.4 6.95 ...

  • Page 27

    ... Device Package Type TPS75201QPWPR HTSSOP TPS75215QPWPR HTSSOP TPS75218QPWPR HTSSOP TPS75225QPWPR HTSSOP TPS75233QPWPR HTSSOP TPS75401QPWPR HTSSOP TPS75415QPWPR HTSSOP TPS75418QPWPR HTSSOP TPS75425QPWPR HTSSOP TPS75433QPWPR HTSSOP PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) PWP 20 2000 PWP 20 2000 PWP 20 2000 PWP 20 ...

  • Page 28

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  • Page 29

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  • Page 30

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  • Page 31

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...

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