DM3730

Manufacturer Part NumberDM3730
ManufacturerTexas Instruments
DM3730 datasheet
 

Specifications of DM3730

ApplicationsAudio,Automotive,Communications and Telecom,Computers and Peripherals,Consumer Electronics,Energy,Industrial,Medical,SecurityOperating SystemsAndroid,DSP/BIOS,Neutrino,ntegrity,Windows Embedded CE,Linux,VXWorks
Dsp1 C64xDsp Instruction TypeFixed Point
Dsp Mhz (max.)660,800Dsp Peak Mmacs6400
Arm Cpu1 ARM Cortex-A8Arm Mhz (max.)800,1000
Arm Mips(max.)2000Graphics Acceleration1 3D
Video CapabilityDecode,Encode,Analytics,Image EnhanceTi Video CodecsH.264-BP,H.264-MP/HP,JPEG,MPEG2-MP,MPEG4-SP,VC1
Video Resolution/frame RateD1 or Less,720pTi Audio CodecsAAC-HE,AAC-LC,G.711,MP3,WMA
On-chip L1 Cache64 KB (ARM Cortex-A8)On-chip L2 Cache256 KB (ARM Cortex-A8)
General Purpose MemoryAsynch SRAM,GPMC  NAND flash,NOR Flash,OneNANDDram1 16-bit LPDDR,1 32-bit SDRC
Usb4Mmc/sd3
Uart(sci)4I2c4
Mcbsp5Spi4
Dma(ch)YesVideo Port (configurable)1 Dedicated Input,1 Dedicated Output
Io Supply(v)1.8Operating Temperature Range(c)-40 to 105,0 to 90,-40 to 90
Pin/package423FCBGA, 515POP-FCBGA  
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1 DM3730, DM3725 Digital Media Processors
1.1
Features
123456
• DM3730/25 Digital Media Processors:
– Compatible with OMAP™ 3 Architecture
®
– ARM
Microprocessor (MPU) Subsystem
®
Up to 1-GHz ARM
Cortex™-A8 Core
Also supports 300, 600, and 800-MHz
operation
NEON™ SIMD Coprocessor
– High Performance Image, Video, Audio
TM
(IVA2.2
) Accelerator Subsystem
Up to 800-MHz TMS320C64x+
Also supports 260, 520, and 660-MHz
operation
Enhanced Direct Memory Access (EDMA)
Controller (128 Independent Channels)
Video Hardware Accelerators
– POWERVR SGX™ Graphics Accelerator
(DM3730 only)
Tile Based Architecture Delivering up to
20 MPoly/sec
Universal Scalable Shader Engine:
Multi-threaded Engine Incorporating Pixel
and Vertex Shader Functionality
Industry Standard API Support:
OpenGLES 1.1 and 2.0, OpenVG1.0
Fine Grained Task Switching, Load
Balancing, and Power Management
Programmable High Quality Image
Anti-Aliasing
– Advanced Very-Long-Instruction-Word
TM
(VLIW) TMS320C64x+
DSP Core
Eight Highly Independent Functional
Units
Six ALUs (32-/40-Bit); Each Supports
Single 32- bit, Dual 16-bit, or Quad 8-bit,
Arithmetic per Clock Cycle
Two Multipliers Support Four 16 x 16-Bit
Multiplies (32-Bit Results) per Clock
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit
Results) per Clock Cycle
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
POWERVR SGX is a trademark of Imagination Technologies Ltd.
2
OMAP is a trademark of Texas Instruments.
3
Cortex, NEON are trademarks of ARM Limited.
4
ARM is a registered trademark of ARM Ltd.
5
All other trademarks are the property of their respective owners.
6
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DM3730, DM3725
Digital Media Processors
Check for Samples: DM3730,
DM3725
Load-Store Architecture With
Non-Aligned Support
64 32-Bit General-Purpose Registers
Instruction Packing Reduces Code Size
All Instructions Conditional
Additional C64x+
– Protected Mode Operation
– Expectations Support for Error
TM
DSP Core
– Hardware Support for Modulo Loop
– C64x+
32K-Byte L1P Program RAM/Cache
(Direct Mapped)
80K-Byte L1D Data RAM/Cache (2-Way
Set- Associative)
64K-Byte L2 Unified Mapped RAM/Cache
(4- Way Set-Associative)
32K-Byte L2 Shared SRAM and 16K-Byte
L2 ROM
– C64x+
Byte-Addressable (8-/16-/32-/64-Bit Data)
8-Bit Overflow Protection
Bit-Field Extract, Set, Clear
Normalization, Saturation, Bit-Counting
Compact 16-Bit Instructions
Additional Instructions to Support
Complex Multiplies
– External Memory Interfaces:
SDRAM Controller (SDRC)
– 16, 32-bit Memory Controller With
– Interfaces to Low-Power SDRAM
– SDRAM Memory Scheduler (SMS) and
General Purpose Memory Controller
(GPMC)
– 16-bit Wide Multiplexed Address/Data
DM3730, DM3725
SPRS685D – AUGUST 2010 – REVISED JULY 2011
TM
Enhancements
Detection and Program Redirection
Operation
TM
L1/L2 Memory Architecture
TM
Instruction Set Features
1G-Byte Total Address Space
Rotation Engine
Copyright © 2010–2011, Texas Instruments Incorporated

DM3730 Summary of contents

  • Page 1

    ... DM3730, DM3725 Digital Media Processors 1.1 Features 123456 • DM3730/25 Digital Media Processors: – Compatible with OMAP™ 3 Architecture ® – ARM Microprocessor (MPU) Subsystem ® • 1-GHz ARM Cortex™-A8 Core Also supports 300, 600, and 800-MHz operation • ...

  • Page 2

    ... CCD and CMOS Imager Interface • Memory Data Input • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/10-Bit) Interface 2 DM3730, DM3725 Digital Media Processors • Glueless Interface to Common Video Decoders • Resize Engine – Resize Images From 1/ – Separate Horizontal/Vertical Control – System Direct Memory Access (SDMA) ...

  • Page 3

    ... Suffix), .65mm Ball Pitch (Top), .5mm Ball Pitch (Bottom) – 423-pin s-PBGA package (CUS Suffix), .65mm Ball Pitch DM3730, DM3725 Digital Media Processors Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 ...

  • Page 4

    ... Cortex™-A8 processors and OMAP™ processors. This DM3730/25 Digital Media Processor data manual presents the electrical and mechanical specifications for the DM3730/25 Digital Media Processor. The information contained in this data manual applies to the commercial, industrial, and extended temperature versions of the DM3730/25 Digital Media Processor unless otherwise indicated. It consists of the following sections: • ...

  • Page 5

    ... Functional Block Diagram The functional block diagram of the DM3730/25 Digital Media Processor is shown below. MPU Subsystem IVA 2.2 Subsystem TMS320DM64x+ DSP ® ARM Imaging Video and Cortex™- A8 Audio Processor TrustZone 32K/32K L1$ 32K/32K L1$ 48K L1D RAM 64K L2$ 32K L2 RAM 16K L2 ROM ...

  • Page 6

    ... Added: • 6 DM3730, DM3725 Digital Media Processors Revision History Revision History Table 2-1. Ball Characteristics (CBP Pkg.). Removed restriction note from GPIO_16. Table 2-2. Ball Characteristics (CBC Pkg.). Removed restriction note from GPIO_16. Table 2-3. Ball Characteristics (CUS Pkg.). Removed restriction note from GPIO_16. ...

  • Page 7

    ... Figure 2-1. DM3730/25 Digital Media Processor CBP s-PBGA-N515 Package (Bottom View) Copyright © 2010–2011, Texas Instruments Incorporated show the ball locations for the 515- and 423- ball plastic ball grid array ...

  • Page 8

    ... Figure 2-2. DM3730/25 Digital Media Processor CBP s-PBGA-N515 Package (Top View) 8 TERMINAL DESCRIPTION Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com ...

  • Page 9

    ... Figure 2-3. DM3730/25 Digital Media Processor CBC s-PBGA-515 Package (Bottom View) Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – ...

  • Page 10

    ... Figure 2-4. DM3730/25 Digital Media Processor CBC s-PBGA-515 Package (Top View) 10 TERMINAL DESCRIPTION Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com ...

  • Page 11

    ... Figure 2-5. DM3730/25 Digital Media Processor CUS s-PBGA-N423 Package (Bottom View) 2.2 Pin Assignments 2.2.1 Pin Map (Top View) The following pin maps show the top views of the 515-pin sPBGA package [CBP], the 515-pin sPBGA package [CBC], and the 423-pin sPBGA package [CUS] pin assignments in four quadrants ( and D). Note: A pin with an " ...

  • Page 12

    ... NC NC vdd_mpu gpmc_wait3 _iva gpmc_wait2 vss vdd_mpu gpmc_wait1 _iva vdd_mpu gpmc_wait0 _iva gpmc_ncs7 vss gpmc_ncs6 vss Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vdds_mem vdds_mem vss vss vss ...

  • Page 13

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 cam_hs cam_d5 vss pop_a22 pop_a23 _a27 _a28 cam_d2 cam_d10 ...

  • Page 14

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vdd_mpu _iva vdd_mpu _iva vdd_mpu _iva vss vdd_mpu vdd_mpu vss vss vss _iva _iva vdd_mpu vdd_mpu vdd_mpu ...

  • Page 15

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 hsusb0_dir gpio_129 vss gpio_128 hsusb0_stp hsusb0_nxt hsusb0 hsusb0_clk _data0 hsusb0 hsusb0 hsusb0 hsusb0 _data4 ...

  • Page 16

    ... vdd_mpu vdds NC _iva vdd_ vdd_mpu NC _iva core cap_vdd vdd_mpu vdd_mpu _sram _iva _iva _mpu_iva Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vss vdds vss NC NC vdd_mpu vss vss NC _iva vdd_mpu ...

  • Page 17

    ... NC clk dat3 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 pop_ pop_ cam_wen cam_d2 NC a20_a25 a21_a26 pop_ NC cam_fld ...

  • Page 18

    ... NC _d4 pop_aa6 pop_y7_ etk_d11 etk_d13 etk_d14 _af5 _af8 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vdd_mpu _iva mmc2 _cmd mmc2 _dat0 mmc2 vdd_mpu vdd_mpu vdds_ _dat2 _iva _iva sram sys_ mmc2 vdd_mpu sys_off ...

  • Page 19

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 vdds_x cam_d7 NC cam_d6 vss vdds cvideo2 pop_ ...

  • Page 20

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com sdrc sdrc _clk _nclk sdrc_d19 sdrc_d21 sdrc_d8 sdrc_d10 sdrc_d16 sdrc_d20 sdrc_d9 sdrc_d4 sdrc_d5 ...

  • Page 21

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 uart3_ cam_hs _cts_ hdq_si0 A rctx uart3_ uart3_ cam_ cam_d5 ...

  • Page 22

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vss vss vss vss vss vss vss vss vss vss vss vss vss vdd_mpu vdds vss vss ...

  • Page 23

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 cap_vdd mmc1_ vdds_ N _bb_mpu gpio_126 dat3 mmc1 _iva hsusb0 gpio_129 P _dir hsusb0 hsusb0 ...

  • Page 24

    ... OH with an active pullup resistor. OH (pulldown/pullup resistor not activated) OL with an active pulldown resistor. OL (pulldown/pullup resistor not activated) OH with an active pullup resistor. OH Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 25

    ... Note: Configuring two pins to the same input signal is not supported as it can yield unexpected results. This can be easily prevented with the proper software configuration. In the DM3730/25 device, new Far End load Settings registers are added for some IOs. This new feature configures application/peripheral load ...

  • Page 26

    ... vdds_mem vdds_mem vdds_mem vdds_mem IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] (12 LVCMOS (12 LVCMOS (12 LVCMOS ...

  • Page 27

    ... vdds_mem vdds_mem vdds_mem IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 28

    ... vdds_mem vdds_mem vdds_mem vdds_mem O IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS ...

  • Page 29

    ... vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 30

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes ...

  • Page 31

    ... L 7 vdds vdds vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 ...

  • Page 32

    ... vdds vdds vdds vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes NA PU/ PD LVCMOS Yes NA PU/ PD LVCMOS Yes NA PU/ PD LVCMOS Yes ...

  • Page 33

    ... H 7 vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] ( (5) Yes 1 PU/ PD LVCMOS ...

  • Page 34

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 35

    ... vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 36

    ... vdds vdds vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 37

    ... L 7 vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes ...

  • Page 38

    ... IO 0 See 0 vdds vdds vdds IOD vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 39

    ... vdds vdds vdds IO O Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 40

    ... vdds vdds vdds O Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 41

    ... PWR - - - - PWR - - - - PWR - - - - PWR - - - - Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 42

    ... PWR - - - - PWR PWR - - - - PWR - - - - PWR - - - - PWR - - - - PWR - - - - GND - - - - Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11 ...

  • Page 43

    ... REL. MODE POWER REL. STATE [5] [7] STATE [6] GND - - - - PWR - - - - - - - - - Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11 ...

  • Page 44

    ... RESET TYPE [4] RESET REL. MODE POWER REL. STATE [5] [7] STATE [6] - GND PWR PWR PWR Table 2-28. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) BUFFER PULLUP IO CELL [8] HYS [9] STRENGTH /DOWN [12] (mA) [10] TYPE [11] Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 45

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (5) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes NA PU/ PD LVCMOS Yes ...

  • Page 46

    ... vdda vdda vdda vdda I Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] (1) Yes 4 PU/ PD LVCMOS (1) Yes 4 PU/ PD LVCMOS (1) Yes 4 PU/ PD LVCMOS ...

  • Page 47

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11 Yes 8 PU/ PD LVCMOS ...

  • Page 48

    ... vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes ...

  • Page 49

    ... H 7 vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 50

    ... vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 51

    ... vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] ( (3) Yes 1 PU/ PD LVCMOS ( (3) Yes ...

  • Page 52

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 53

    ... L 7 vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 54

    ... vdds vdds vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 55

    ... vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 56

    ... L 7 vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 ...

  • Page 57

    ... vdds vdds IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 8 PU/ PD ...

  • Page 58

    ... H 4 vdds vdds vdds IO IO Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 59

    ... vdds vdds I Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 60

    ... vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes ...

  • Page 61

    ... PWR - - - - PWR - - - - PWR - - - - GND - - - - Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 62

    ... TYPE [4] BALL BALL RESET RESET POWER RESET REL. STATE REL. MODE STATE [5] [6] [7] GND - - - - PWR - - - - - - - - - Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11 Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 63

    ... REL. STATE REL. MODE STATE [5] [6] [ GND vdds PWR PWR PWR Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN [12] (mA) [10] TYPE [11 Yes 8 PU/PD LVCMOS ...

  • Page 64

    ... vdds_mem vdds_mem vdds_mem vdds_mem vdds_mem vdds_mem Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] (8) Yes 4 PU/ PD LVCMOS (8) Yes 4 PU/ PD LVCMOS (8) Yes 4 PU/ PD ...

  • Page 65

    ... Z 0 vdds_mem vdds_mem vdds_mem vdds_mem vdds_mem Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] (8) Yes 4 PU/ PD LVCMOS (8) ...

  • Page 66

    ... vdds_mem vdds_mem vdds_mem vdds_mem vdds_mem vdds_mem Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS ...

  • Page 67

    ... vdds_mem vdds_mem vdds_mem vdds_mem Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS ...

  • Page 68

    ... vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS Yes 8 PU/ PD LVCMOS ...

  • Page 69

    ... H 7 vdds vdds vdds vdds vdda_dac Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 ...

  • Page 70

    ... vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] ( 10-bit DAC ( 10-bit DAC (7) NA ...

  • Page 71

    ... vdds_mmc1 vdds_mmc1 vdds_mmc1 4) Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes NA PU/ PD LVCMOS Yes ...

  • Page 72

    ... vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] (4) Yes 1 PU/ PD LVCMOS (4) Yes 1 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 73

    ... L 7 vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 ...

  • Page 74

    ... vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 75

    ... L 7 vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 ...

  • Page 76

    ... H 0 vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 77

    ... H 0 vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 8 PU/ PD LVCMOS Yes 8 ...

  • Page 78

    ... vdds vdds vdds vdds vdds vdds Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD LVCMOS ...

  • Page 79

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11] Yes 4 PU/ PD LVCMOS Yes 4 PU/ PD ...

  • Page 80

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) [8] HYS [9] BUFFER PULLUP IO CELL STRENGTH /DOWN (mA) [10] TYPE [11 ...

  • Page 81

    ... Extended-Drain I/Os and PBIAS Cells Programming Guide section of the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4). Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 TERMINAL DESCRIPTION 81 ...

  • Page 82

    ... B17 sdrc_d30 B18 sdrc_d31 C18 sdrc_ba0 D18 sdrc_ba1 A4 sdrc_a0 B4 sdrc_a1 D6 sdrc_a2 B3 sdrc_a3 B2 sdrc_a4 C3 sdrc_a5 E3 sdrc_a6 F6 sdrc_a7 E10 sdrc_a8 E9 sdrc_a9 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MODE 3 MODE 4 MODE 5 MODE 6 Copyright © 2010–2011, Texas Instruments Incorporated MODE 7 ...

  • Page 83

    ... N2 gpmc_d3 M3 gpmc_d4 P1 gpmc_d5 P2 gpmc_d6 R1 gpmc_d7 R2 gpmc_d8 T2 gpmc_d9 U1 gpmc_d10 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MODE 3 MODE 4 MODE 5 MODE 6 MODE 7 safe_mo de_out1 safe_mo de_out1 gpio_34 safe_mo de gpio_35 safe_mo de gpio_36 safe_mo ...

  • Page 84

    ... AB19 dss_data1 uart1_rts AD20 dss_data2 AC20 dss_data3 AD21 dss_data4 uart3_rx_irrx AC21 dss_data5 uart3_tx_irtx D24 dss_data6 uart1_tx Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MODE 3 MODE 4 MODE 5 MODE 6 gpio_47 safe_mo de gpio_48 safe_mo de gpio_49 safe_mo de gpio_50 safe_mo de gpio_51 safe_mo ...

  • Page 85

    ... G19 cam_d2 F19 cam_d3 G20 cam_d4 B21 cam_d5 L24 cam_d6 K24 cam_d7 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MODE 3 MODE 4 MODE 5 MODE 6 MODE gpio_77 hw_dbg15 safe_mo de gpio_78 hw_dbg16 safe_mo de ...

  • Page 86

    ... Y3 mmc2_dat1 W3 mmc2_dat2 mcspi3_cs1 V3 mmc2_dat3 mcspi3_cs0 AB2 mmc2_dat4 mmc2_dir_dat 0 AA2 mmc2_dat5 mmc2_dir_dat cam_global_res mmc3_dat1 gpio_137 1 et Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MODE 3 MODE 4 MODE 5 MODE 6 (1) gpio_107 safe_mo de (1) gpio_108 safe_mo de gpio_109 hw_dbg8 safe_mo de gpio_110 hw_dbg9 ...

  • Page 87

    ... C23 uart3_tx_irtx R21 hsusb0_clk R23 hsusb0_stp P23 hsusb0_dir R22 hsusb0_nxt Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MODE 3 MODE 4 MODE 5 MODE 6 MODE mmc3_dat2 gpio_138 safe_mo de mmc3_dat3 gpio_139 mm3_rxdm safe_mo de gpio_140 ...

  • Page 88

    ... M4 mcspi2_cs1 gpt_8_pwm_e vt AA16 sys_32k AD15 sys_xtalin AD14 sys_xtalout Y13 sys_clkreq W16 sys_nirq AA10 sys_nrespwro n Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MODE 3 MODE 4 MODE 5 MODE 6 gpio_125 uart2_tx safe_mo de gpio_130 uart2_rx safe_mo de gpio_131 uart2_rts safe_mo de gpio_169 uart2_cts safe_mo ...

  • Page 89

    ... AC3 etk_d10 uart1_rx AC9 etk_d11 AC10 etk_d12 AD11 etk_d13 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MODE 3 MODE 4 MODE 5 MODE 6 MODE gpio_30 safe_mo de dss_data18 gpio_2 safe_mo de dss_data19 gpio_3 ...

  • Page 90

    ... U10, V9, V10, W9, W10, Y9 E16, F15, vdds_mem F16, G15, G16, H15, J6, J7, J8, K6, K7, K8 U17 vdda_dpll_per AA13 vdda_wkup_b g_bb Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MODE 3 MODE 4 MODE 5 MODE 6 hsusb2_dat gpio_28 mm2_rxrcv hw_dbg a0 16 hsusb2_dat gpio_29 mm2_txse0 hw_dbg a1 17 Copyright © ...

  • Page 91

    ... N20 cap_vddu_arr ay NA vss NA vss NA vdds NA vss NA vdds U8 cap_vdd_sra m_mpu_iva H17 cap_vdd_sra m_core W15 sys_xtalgnd Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MODE 3 MODE 4 MODE 5 MODE 6 MODE 7 TERMINAL DESCRIPTION 91 ...

  • Page 92

    ... AB17 / AD6 AC18 / AD5 AB18 / AC5 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) BALL TOP BALL SUBSYSTEM (CBC Pkg.) [5] BOTTOM PIN (CUS MULTIPLEXING Pkg.) [4] [6] ...

  • Page 93

    ... V2 T2 AD5 AC5 IO H2 AB3 AC3 Y1 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) BALL TOP BALL SUBSYSTEM (CBC Pkg.) [5] BOTTOM PIN (CUS MULTIPLEXING Pkg.) [4] [ H2/ R2 ...

  • Page 94

    ... AB12 AC11 I L8 AC10 AC8 NOTE Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) BALL TOP BALL SUBSYSTEM (CBC Pkg.) [5] BOTTOM PIN (CUS MULTIPLEXING Pkg.) [4] [ ...

  • Page 95

    ... O NA V22 O NA V23 O NA W22 O NA W23 O NA Y22 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) BALL TOP BALL BOTTOM (2) [4] (CBC Pkg.) [5] (CUS Pkg ...

  • Page 96

    ... NA A17 A20 IO NA B17 B20 Table 2-4. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) BALL TOP BALL BOTTOM (2) [4] (CBC Pkg.) [5] (CUS Pkg.) NA T21 A19 NA T20 B19 NA A12 A10 NA B13 A11 NA Y15 ...

  • Page 97

    ... O AH24 / AC28 O E26 O F28 O F27 O G26 O AD28 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] C23 A22 D23 E18 C25 B22 E25 C22 ...

  • Page 98

    ... G25 L25 I H27 L26 I H26 / AH26 M24 / F3 I H25 / AG26 M26 / D3 O E28 / AF18 F25 / E3 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com BALL BOTTOM BALL BOTTOM [4] (CBC Pkg.) [4] (CUS Pkg.) AD26 AC23 AA25 AB22 Y25 Y22 AA26 W22 ...

  • Page 99

    ... Pkg.) [4] AO Y28 AO W28 AO Y27 AO W27 AIO W26 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] W26 AB24 V26 AA23 W25 AB23 U24 ...

  • Page 100

    ... OD AD26 IOD AE26 TYPE [3] BALL BOTTOM (CBP Pkg.) [4] Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] J23 A24 BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg ...

  • Page 101

    ... O AB1 O AB2 IO AA3 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] T20 Y18 U19 / W19 V17 AB20 U17 W18 ...

  • Page 102

    ... AH24 / H21 / T27/ G26 [2] TYPE BALL BOTTOM [3] (CBP Pkg.) Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [ W10 / M24 / AA3 ...

  • Page 103

    ... AG8 IO AH8 IO AB2 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Section 4.3.6 (continued) BALL BOTTOM BALL BOTTOM [4] (CBC Pkg.) [4] (CUS Pkg.) [4] W19 R21 U20 R23 V19 P23 ...

  • Page 104

    ... AF11 IO AG12 IO AH12 IO AH14 IO AE11 IO AH9 IO AF13 IO AE13 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Section 4.3.6 (continued) BALL BOTTOM BALL BOTTOM [4] (CBC Pkg.) [4] (CUS Pkg.) [ AB3 AD3 AB2 AC1 AA4 ...

  • Page 105

    ... AF3 / AF13 IO AE3 / AE13 IO AF11 IO AG9 IO AF9 IO AH14 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] N19 M23 L18 L23 M19 M22 M18 ...

  • Page 106

    ... Pkg.) [4] I AA17 I AA13 O AA12 IO AA18 I AA20 O AA19 IO AA11 IO AA10 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] AB3 AD3 AB2 AC1 AC3 AD6 AD4 AC6 AD3 AC7 AA3 AD8 ...

  • Page 107

    ... AD25 / AB26 / AB25 / AA25 / Y4 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 BALL BOTTOM SUBSYSTEM (CUS Pkg.) [4] SIGNAL MULTIPLEXING [6] AC9 / AC24 / AC11 etk_d11 / jtag_emu0 / etk_d14 AC10 / AD24 / ...

  • Page 108

    ... Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] V16 W16 W15 Y13 F3 AB12 D3 AC16 C3 AD17 E3 AD18 ...

  • Page 109

    ... E28 IO J26 IO AC27 IO AC28 IO A24 IO A23 IO C25 IO C27 IO C23 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [ AD1 NA ...

  • Page 110

    ... IO AE5 IO AB26 IO AB25 IO AA25 IO AD25 IO AA8 IO AA9 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) (continued) BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] AE16 AB18 AE15 AC18 A24 G19 B24 F19 ...

  • Page 111

    ... AG14 IO AE22 IO U25 IO V28 IO V27 IO V26 Table 2-1 and Table 2-4. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) BALL BOTTOM BALL BOTTOM (CBC Pkg.) [4] (CUS Pkg.) [4] W2 AC2 ...

  • Page 112

    ... AB24 AC5 / F23 / E1 / C23 / A10 / A15 / A18 C28 AA16 NA U14 AA14 NA W14 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) BALL TOP BALL BOTTOM (2) [4] (CBC Pkg.) [5] (CUS Pkg.) NA W13/ W12/ V13/ V12/ U13/ U12/ T8/ T7/ R8/ R7/ R6/ N8/ ...

  • Page 113

    ... AH21 NA AC19 Y17 NA AF23 Table 2-4. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (continued) BALL TOP BALL BOTTOM (2) (2) [4] (CBC Pkg.) [5] (CUS Pkg.) C1/ F1/ H2/ M2/ R2/ V16/ V15/ U16/ Y6/AA7/ Y11/ AA16/ ...

  • Page 114

    ... BALL TOP BALL BOTTOM AA1 AF1 AE2 Y2 AF4 AA6 AF5 Y7 AF8 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (1) BALL BALL TOP BALL BOTTOM (CBC Pkg.) BOTTOM (2) (2) [5] (CBC Pkg.) [5] (CUS Pkg.) [4] [4] NA AE20 NA AA16 NA ...

  • Page 115

    ... AG1 AB23 AG28 AC1 AH1 AC2 AH2 AC22 AH27 AC23 AH28 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 pop_y9_af10 pop_aa10_af12 pop_aa11_af13 pop_aa12_af14 pop_aa13_af15 pop_y14_af17 pop_aa14_af16 pop_b16_a20 pop_y17_af21 pop_aa17_af18 pop_y19_af24 pop_aa19_af22 ...

  • Page 116

    ... AG10 AB13 AG15 B12 B15 H22 J27 K2 M2 K22 M26 L2 N2 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com NC pop_b23_b28 pop_ab11_ag13 pop_ac14_ah16 pop_aa2_aa2 pop_u2_af2 pop_aa22_af27 pop_ab8_ag10 pop_ab13_ag15 pop_b12_b15 pop_h22_j27 pop_k2_m2 pop_k22_m26 pop_l2_n2 ...

  • Page 117

    ... CAM (2) Body Model) (8) GPMC Other signals (3) CDM (Charged Device Model) (5) to determine the ball information per package. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MIN MAX UNIT –0.5 1.5 V –0.5 1.5 V –0.5 2.1 V – ...

  • Page 118

    ... V (vdd_mpu_iva) nominal OPP voltage: DD1 – DM3730 (800M Hz): @1.27V – DM3730 (600M Hz): @1.14V (6) This maximum vdd_mpu_iva current is observed at OPP1G operating point. (7) Depending on the microprocessor chosen, the IVA feature may or may not be supported. See the on device features. 118 Electrical Characteristics PARAMETER ...

  • Page 119

    ... Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Table 3-4. The POH OPP1G MAX TIME Not available 25K(1) 75K NOM MAX UNIT (1) See ...

  • Page 120

    ... Processor Clocks. OPP voltage values may change following the silicon characterization result. 120 Electrical Characteristics MIN 1.71 Commercial 0 Temperature Industrial Temperature -40 Extended Temperature -40 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com NOM MAX UNIT 1.80 1. ° ...

  • Page 121

    ... Normal Mode (SPEEDCTRL ( High-Speed (SPEEDCTRL ( 0.625 * vdds_mmc1 –0.3 0.75 * vdds_mmc1 OH 0.05 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Table 3-5 have NOM MAX UNIT V 0.3 * vdds_mem V V vdds_mem V 0.2 * vdds_mem V 1. ...

  • Page 122

    ... OH –0.3 0.05 evaluated Normal Mode (SPEEDCTRL ( (6) 0.7 * vdds –0.5 0.15 (18) NA –10 with a bus capacitance ILmax 20 + 0.1C 0.7 * vdds –0.5 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com NOM MAX vdds_x + 0.3 0.20 * vdds_x vdds_x + 0.3 0 vdds_x + 0.3 0.20 * vdds_x vdds_x + 0.3 0 vdds + 0.5 ...

  • Page 123

    ... I = – X vdds – 0. (17 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 NOM MAX 0.2 * vdds 10 10 250 B 250 B vdds + 0.5 0.3 * vdds 0.2 * vdds ...

  • Page 124

    ... ROUT 7 or fall time, t 1.5 ROUT FOUT 2 or fall time, t 0.6 ROUT FOUT 2 0.25 0.07 0.15 applies only to those that are. hys (t and t IN RIN FIN Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com NOM MAX 1.15 1.35 10 2.20 10 1.15 10 (16 (16 (16 (19) : AE22 (17) 2 ...

  • Page 125

    ... Ball Characteristics Section 2.4, Multiplexing Characteristics table. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 is larger than the maximum single-ended IL )/2. Common mode ripple may be due to section, column “BUFFER DRIVE Electrical Characteristics ...

  • Page 126

    ... Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com TYP MAX UNIT 1.2 1.8 μF (2) μF PCB Design Requirements for application note. MAX UNIT 600 nF 1050 ...

  • Page 127

    ... C cap_vdd_bb_mpu_iva Copyright © 2010–2011, Texas Instruments Incorporated MIN TYP 0.7 1 0.7 1 0.7 1 0.7 1 0.7 1 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MAX UNIT 1.3 μF 1.3 μF 1.3 μF 1.3 μF 1.3 μF Electrical Characteristics 127 ...

  • Page 128

    ... DPLL5 VDDS_MEM BG DPLL4 BBLDO WKUP_LOGIC MPU CORE VDDS I/O OSCILLATOR Figure 3-1. External Capacitors Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com vdds_sram vdds_sram Cvdds_sram Ccap_vdd_sram_mpu_iva Ccap_vdd_sram_core vdda_dplls_dll vdda_dplls_dll Cvdda_dplls_dll vdda_dpll_per vdda_dpll_per Cvdda_dpll_per vdd_mpu_iva ...

  • Page 129

    ... AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4). Figure 3-2 shows the power-up sequence. Copyright © 2010–2011, Texas Instruments Incorporated NOTE NOTE NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Electrical Characteristics 129 ...

  • Page 130

    ... Electrical Characteristics 1.8 V 1.8 V (1) 1.1 V (1) 1.1 V Figure 3-2. Power-Up Sequence Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Figure 3-3. Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 131

    ... IO domains shut down and vdda_sram shuts down. Copyright © 2010–2011, Texas Instruments Incorporated Figure 3-3. Power-Down Sequence Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Electrical Characteristics 131 ...

  • Page 132

    ... From quartz (oscillator input) or square clock Clock request. To square clock source or from peripherals Oscillator is bypassed GPin Figure 4-1. Clock Interface Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com sys_xtalout Unconnected sys_xtalin Square clock sys_clkreq source ...

  • Page 133

    ... Table 4-1. Input Clock Requirements STABILITY +/- 200 ppm Crystal ±50 ppm (±5 (1) ppm) Square ±50 ppm (±5 (1) ppm) +/-50 ppm Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (4) DUTY CYCLE JITTER TRANSITION - - < (2) 45% to 55% X% ...

  • Page 134

    ... Figure 4-2. Crystal Implementation DESCRIPTION ( pF. Parasitic capacitance from package and board must also be taken ))) . f2 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Table 4-2 summarizes (1) MIN TYP MAX UNIT 12, 13, 16.8, or 19.2 MHz 100 Ω ...

  • Page 135

    ... Copyright © 2010–2011, Texas Instruments Incorporated MIN 12, 13, 16.8, or 19.2 3 parameter. sX MIN 12, 13, 16.8, 19.2, 26, or 38.4 1.00 160 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 TYP MAX UNIT MHz ms TYP MAX UNIT MHz 1.15 1.35 ...

  • Page 136

    ... Frequency stability, sys_32k J(32k) 136 Clock Specifications MIN 12, 13, 16.8, 19.2, 26, or 38.4 0. c(xtalin) (1) , sys_xtalin OSC0 MIN 3 MIN Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (5) TYP MAX UNIT MHz 0. c(xtalin) ( (3) tc(xtalin) - ...

  • Page 137

    ... Figure 4-4. sys_32k Input Clock MIN 3 MIN 0. c(altclk) (1) , sys_altclk -1% ALT0 Figure 4-5. sys_altclk Input Clock Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 CK1 CK1 SWPS038-009 TYP MAX UNIT MHz 1 MΩ ...

  • Page 138

    ... Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com TYP MAX UNIT MHz Ω Ω Ω ...

  • Page 139

    ... MIN sys_xtalin clock or core_dpll clock MIN sys_xtalin clock or core_dpll clock (7) (7) (7) 0.49*tc(clkout 2) Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (6) (continued) TYP MAX UNIT ( CO1 CO1 SWPS038-011 TYP MAX ...

  • Page 140

    ... Clock Specifications MIN Source clock: sys_xtalin Source clock: core_dpll Source clock: 54MHz Source clock: 96MHz (1) 1.5 (1) 1.5 CO0 Figure 4-7. sys_clkout2 Output Clock NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (8) (continued) TYP MAX UNIT ( 200 c(xtalin ...

  • Page 141

    ... Table 4-15. DPLL4 Characteristics MIN TYP 1.71 1.8 0.5 0.5 0.001 (1) 10 500 (3) (Low Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 MAX UNIT COMMENTS 1. MHz FINP 52 MHz REFCLK 1000 MHz FINPHIF 800 ...

  • Page 142

    ... Maximum frequency for nominal conditions. 142 Clock Specifications MIN TYP (3) (Fast Table 4-16. DLL Characteristics MIN TYP 1.71 1.8 66 120 250 1.88 1.50 1.25 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com MAX UNIT COMMENTS 7.5 + μs DPLL in low-power mode: 125*REFCLKs lowcurrstdby = 1 μ μs MAX UNIT COMMENTS 1.91 V 200 ...

  • Page 143

    ... OPP100 MAX MIN TYP 1.02 1.08 1.14 OPP100 MAX MIN TYP MAX MIN Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Noise Filter vdda_dplls_dll C Noise Filter vdda_dpll_per C 030-017 TYP MAX UNIT 100 150 nF TM ...

  • Page 144

    ... AVS (Adaptive Voltage Scaling) power technique must be used to achieve optimum operating voltage. (6) Based on DM3730 PCB constraints, the vdd_mpu_iva (VDD1) voltage value calibrated before enabling SmartReflex™ is recommended to be 1.38V. Minimum (1.28V) and typical (1.33V) values provided can be achieved only with very good power delivery network design. ...

  • Page 145

    ... V (corresponding to vdd_core, Core and SGX DD2 (2) OPP 100 MIN TYPICAL 1.08 1.14 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 OPP100 MIN TYP MAX 1.08 1.14 1.20 OPP100 Ratio Max Ratio Max Ratio Freq ...

  • Page 146

    ... Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (2) (2) OPP 100 Max Freq Ratio Ratio (MHz) 532 1728 (M2 = 532 (1)(3) (1)( ...

  • Page 147

    ... I DAC + TVBUF – R OUT cvideo1_vfb TVDET VREF cvideo1_rset R SET = External pin Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 5.4, Electrical Specifications Over R LOAD swps038-125 Mode(1) Video DAC Specifications 147 ...

  • Page 148

    ... I DAC + cvideo1_out TVBUF OFF – cvideo1_vfb R TVDET LOAD VREF OFF cvideo1_rset R SET = External pin swps038-131 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Electrical Specifications Over 5.4, Electrical Specifications Over Mode(1) ...

  • Page 149

    ... Mode Specifications (DAC-Only) Figure 5-3 shows the connection. For more information regarding Section Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Electrical Specifications Over 5.4, Electrical Specifications Over Configuration(1) Video DAC Specifications 149 ...

  • Page 150

    ... Low-swing mode code range, High-swing mode Ω LOAD - Low-swing mode High-swing mode Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (8) MIN TYP MAX UNIT 10 Bits –6 6 LSB –4 4 – ...

  • Page 151

    ... T = 30ºC, Full Low-swing mode or Partial Power High-swing mode Management T = 30ºC, VDD = 1 Power Management Figure 5-4. NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (8) (continued) MIN TYP MAX UNIT 4.5 6.5 8 ...

  • Page 152

    ... MHz mode CLK OUT AC mode = 54 MHz mode CLK OUT AC mode Load1 = C TOT Load1 Load2 Figure 5-4. Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (6) MIN TYP MAX UNIT 54 60 MHz 40 70 1.5 6 MHz –5% 5% –5% 5% –3º 3º ...

  • Page 153

    ... Figure 5-4 for more details on the relation between the composite NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Peak level White level Black level Blanking level Sync level SWPS038-130 Levels(1)(2) ...

  • Page 154

    ... MHz MHz, sine CLK OUT wave input, 256 to 768 input code range 100 mVpp at 6 MHz, input code 895 Figure 5-4. variation as shown Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (2) MIN TYP MAX UNIT 10 –1 1 –1 1 0.6 0.7 0.77 0.6 ...

  • Page 155

    ... Maximum Supply Noise Density < 20 µV / √Hz Decreases 20 dB/dec. Example MHz the maximum noise density is 2 µV / √Hz Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 5-6. PP 5-7. Video DAC Specifications 155 ...

  • Page 156

    ... Because the DAC PSRR deteriorates at a rate of 20 dB/dec after 100 kHz highly recommended to have vdda_dac low pass filtered (proper decoupling) (see the illustrated application: Component Value Choice). 156 Video DAC Specifications Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Section 5.7, External ...

  • Page 157

    ... TVOUT High-Swing mode. REF * (1 – DAC_CODE / 1023) (4) and R out1/2 NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 , and REF resistors, as well for C capacitor, set out Video DAC Specifications 157 ...

  • Page 158

    ... Maximum pulse duration = Typical pulse duration + maximum duty cycle error • Minimum pulse duration = Typical pulse duration - maximum duty cycle error 158 Timing Requirements and Switching Characteristics Tn Figure 6-1. Cycle (or Period) Jitter NOTE Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Tn+1 SWPS038-013 Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 159

    ... Unknown, changing, or don’t care level Fall time High Low Rise time Valid Invalid Active edge First edge Last edge High impedance Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 159 ...

  • Page 160

    ... Timing Requirements and Switching Characteristics NOTE Figure 6-2 through Figure 6-6). OPP100 MIN 2.3 1.5 (2) valid before 2.3 (2) valid after output 1.9 OPP100 MIN 0.5P 0.5P Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com VALUE UNIT 1 (1) OPP50 UNIT MAX MIN MAX 2.3 ns 1.5 ns 2.3 ns 1.9 ...

  • Page 161

    ... Write Read Write Read Write H M Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (2) (18) (continued) OPP100 OPP50 MIN MAX MIN MAX –500 500 –500 500 33 ...

  • Page 162

    ... ClkActivationTime – multiple of 3) (14) (14) if (ClkActivationTime and OEOnTime are odd) or (ClkActivationTime and OEOnTime (14) otherwise (14) if ((OEOnTime – ClkActivationTime multiple of 3) Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (14) (14) (14) (14) (14) (14) (14) (14) (14) ...

  • Page 163

    ... ClkActivationTime – multiple of 3) (14) if ((WEOffTime – ClkActivationTime – multiple of 3) (14) Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (14) (14) 163 ...

  • Page 164

    ... Timing Requirements and Switching Characteristics F18 Valid Address F19 F19 F8 F8 F20 OUT Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com F10 F11 F13 F12 D 0 F23 F24 OUT IN SWPS038-014 ...

  • Page 165

    ... Valid Address F8 F8 F21 OUT OUT Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 F10 F11 F13 F13 F12 F12 ...

  • Page 166

    ... Timing Requirements and Switching Characteristics F17 F17 F8 F8 F14 F14 F15 D 0 OUT Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com F3 F17 F17 F17 F17 F9 F15 F15 SWPS038-016 ...

  • Page 167

    ... Copyright © 2010–2011, Texas Instruments Incorporated F2 Valid Valid Address (MSB F10 F23 OUT OUT Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 F12 F13 F12 ...

  • Page 168

    ... F18 Address (MSB) F17 F17 F8 F8 F20 F14 F15 F22 F21 OUT Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com F3 F17 F17 F17 F17 F9 F14 F15 F15 SWPS038-018 ...

  • Page 169

    ... Copyright © 2010–2011, Texas Instruments Incorporated Figure 6-7 through Figure 6-12). OPP100 MIN (3) (3) Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 VALUE UNIT 1 (1) (2) (4) OPP50 UNIT ...

  • Page 170

    ... J – 0.2 (13) valid (9) J – 0.2 valid (13) (10) K – 0.2 K (13) (11) L – 0.2 (13) (11) L – 0.2 (13) (14) M – 0.2 M Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (7) OPP100 OPP50 MAX MIN MAX (5) ( (4) ( (5) ( (16) OPP50 UNIT MAX MIN MAX 2 ...

  • Page 171

    ... F – 0.2 (9) J – 0.2 (13) valid (15) (15) (15) (15) Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (16) (continued) OPP100 OPP50 MAX MIN MAX (7) ( (8) (8) ( 2.0 I – ...

  • Page 172

    ... Timing Requirements and Switching Characteristics FA5 FA1 Valid Address FA0 Valid FA0 Valid FA4 FA13 FA15 FA14 OUT Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Data IN 0 Data OUT SWPS038-019 Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 173

    ... FA0 Valid FA10 FA12 FA4 FA15 IN OUT Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 FA5 FA1 Address 1 FA0 Valid FA0 Valid FA3 FA4 FA13 Data Upper ...

  • Page 174

    ... Timing Requirements and Switching Characteristics FA20 FA21 FA1 Add0 Add1 FA0 FA0 FA18 FA13 D0 FA15 FA14 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com FA20 FA20 Add2 Add3 Add4 SWPS038-021 Copyright © 2010–2011, Texas Instruments Incorporated D3 OUT ...

  • Page 175

    ... Copyright © 2010–2011, Texas Instruments Incorporated FA1 Valid Address FA0 FA0 FA3 FA27 FA25 Data OUT OUT Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 SWPS038-022 175 ...

  • Page 176

    ... Figure 6-11. GPMC / Multiplexed NOR Flash—Asynchronous Read—Single Word 176 Timing Requirements and Switching Characteristics FA1 FA5 Address (MSB) FA0 Valid FA0 Valid FA4 FA13 FA37 FA15 FA14 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Data IN Data IN OUT IN SWPS038-023 Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 177

    ... Copyright © 2010–2011, Texas Instruments Incorporated FA1 Address (MSB) FA0 FA0 FA27 FA25 FA28 OUT Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Data OUT SWPS038-024 177 ...

  • Page 178

    ... Timing Requirements and Switching Characteristics assume testing over the recommended operating conditions and electrical Figure 6-13 through Figure OPP100 MIN (3) (3) (3) (3) (3) (3) OPP100 MIN (3) Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com 6-16). VALUE UNIT 1 (1) (2) (4) OPP50 MAX MIN MAX 6.5 9.1 4 ...

  • Page 179

    ... K (11) L (12) – 0.2 M (13) invalid (14) (14) (14) (14) (14) Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (15) OPP50 UNIT MAX MIN MAX ( (2) ...

  • Page 180

    ... Timing Requirements and Switching Characteristics GNF1 GNF2 GNF0 GNF3 Command GNF1 GNF7 GNF9 GNF0 GNF3 Address Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com GNF6 GNF5 GNF4 SWPS038-025 GNF6 GNF8 GNF4 SWPS038-026 ...

  • Page 181

    ... Copyright © 2010–2011, Texas Instruments Incorporated GNF12 GNF10 GNF14 GNF13 DATA GNF1 GNF9 GNF0 GNF3 DATA Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 GNF15 SWPS038-027 GNF6 GNF4 SWPS038-028 181 ...

  • Page 182

    ... Timing Requirements and Switching Characteristics NOTE show the LPDDR interface schematics for a LPDDR memory system. The 1 Figure 6-17 except that the high word LPDDR device is Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 183

    ... A0 T A14 A14 N/C T CAS CAS T RAS RAS CKE CKE N Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 LPDDR 183 ...

  • Page 184

    ... A14 T CS N/C T CAS T RAS CKE N MIN MAX LPDDR-266 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com LPDDR UNIT NOTES (1) See Note Bits (2) Devices See Note Balls ...

  • Page 185

    ... Table 6-16. The placement does not restrict the side of the PCB Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 Table DESCRIPTION Top Routing Mostly Horizontal Ground Power ...

  • Page 186

    ... LPDDR Y Device Y OMAP OFFSET A1 Recommended LPDDR Device Orientation Table 6-16. Placement Specifications MIN MAX 1440 1030 525 4 Figure Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com UNIT NOTES (1) (2) Mils See Notes , (1) (2) Mils See Notes , (1) (2) (3) Mils See Notes ...

  • Page 187

    ... DQS0 DQS1 DQS2 DQS3 Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 lists the signal net classes, and PIN NAMES sdrc_dqs0 sdrc_dqs1 sdrc_dqs2 sdrc_dqs3 PIN NAMES ...

  • Page 188

    ... OMAP A1 MIN TYP (4) 4w CACLM-50 CACLM 4w 3w AM37x CUS Routing Guidelines (SPRABD4) Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com UNIT NOTES (1) Ω See Note (1) (2) (3) Ω See Notes , , (1) (2) (3) Ω See Notes , , (5) MAX ...

  • Page 189

    ... DQLM - 50 DQLM DQLM + AM37x CUS Routing Guidelines (SPRABD4) Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 (1) (6) MAX UNIT NOTES 25 Mils See Note Mils See Note ...

  • Page 190

    ... Timing Requirements and Switching Characteristics NOTE The other serial interface OPP100 MIN MAX (4) 216 (2) 0.5P (2) 0.5P (4) (2) 0 (4) 0.044 * P (4) 0.93 (4) 0.93 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com data goes directly to memory. OPP50 UNIT MIN MAX 216 MHz (2) 0.5P ns (2) 0.5P ns (2) - 2.083 0 2.083 ps (2) (2) ...

  • Page 191

    ... Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 VALUE UNIT MIN MAX 80 1800 ps ...

  • Page 192

    ... Figure 6-23. CPI—Video and Graphics Digitizer—1.8-V Progressive Mode 192 Timing Requirements and Switching Characteristics ISP3 ISP2 ISP8 ISP9 D(n-2) D(n-1) D(0) Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com ISP5 ISP7 D(n-2) D(n-1) ISP10 ISP11 SWPS038-048 Copyright © 2010–2011, Texas Instruments Incorporated ...

  • Page 193

    ... ISP3 ISP2 ISP5 ISP7 ISP8 ISP9 D(0) D(n–1) D(0) ISP13 EVEN 6-25). Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 D(0) D(n–1) D(n–1) ISP10 ISP11 ODD SWPS038-049 (1) VALUE UNIT 2 ...

  • Page 194

    ... See Section 4.3.4, Processor Clocks. 194 Timing Requirements and Switching Characteristics OPP100 MIN 0.5P 0.5P 1.82 1.82 1.82 1.82 1.82 1.82 1.82 1.82 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (4) (5) OPP50 UNIT MAX MIN MAX 75 45 MHz (2) (2) 0.5P ns (2) (2) 0.5P ns (2) (2) ...

  • Page 195

    ... ISP23 ISP24 D(n–2) D(n–1) D(0) ISP25 Table 6-22 for ISP15 and ISP16 parameters. 6-26). Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 ISP20 ISP22 D(n–1) D(1) ISP26 SWPS038-050 (1) VALUE UNIT 2 ...

  • Page 196

    ... Processor Clocks. 196 Timing Requirements and Switching Characteristics OPP100 MIN (2) 0.5*P (2) 0.5*P 0.5*P 3.465 0.0649*P 1.08 1.08 1.08 1.08 1.08 1.08 1.08 1.08 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (4) (5) OPP50 UNIT MAX MIN MAX 130 65 MHz (2) 0.5*P ns (2) 0.5*P ns (2) (2) - 0.5 ...

  • Page 197

    ... ISP4 ISP4 ISP9 D(n-2) D(n-1) D(0) ISP11 Table 6-22 for ISP15 and ISP16 parameters. 6-27). Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 ISP6 ISP8 ISP10 D(1) D(n-1) ISP12 SWPS038-051 VALUE UNIT 2 ...

  • Page 198

    ... See Section 4.3.4, Processor Clocks. 198 Timing Requirements and Switching Characteristics OPP100 MIN 0.5P 0.5P 1.82 1.82 1.82 1.82 1.82 1.82 1.82 1.82 1.82 1.82 Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com (4) (5) OPP50 UNIT MAX MIN MAX 75 45 MHz (2) (2) 0.5P ns (2) (2) 0.5P ns (2) (2) 0.5 ...

  • Page 199

    ... ISP21 L(n-1) D(0) D(n-2) D(n-1) ISP25 ISP28 ISP27 Table 6-22 for ISP15 and ISP16 parameters. Timing Requirements and Switching Characteristics Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 DM3730, DM3725 SPRS685D – AUGUST 2010 – REVISED JULY 2011 FRAME(0) ISP22 L(0) ISP23 ISP24 D(1) D(2) D(n-1) ISP26 IMPAIR SWPS038-052 ModeSection 5.3 ...

  • Page 200

    ... The timing requirements are assured up to the cycle jitter and duty cycle error conditions specified. (5) See Section 4.3.4, Processor Clocks. 200 Timing Requirements and Switching Characteristics 6-28). MIN 1.08 1.08 1.08 1.08 1.08 1.08 1.08 1.08 1.08 1.08 Submit Documentation Feedback Product Folder Link(s): DM3730 DM3725 www.ti.com VALUE UNIT 2.5 ns 2.5 ns 8.6 pF (4) (5) OPP100 OPP50 UNIT MAX MIN MAX 130 65 MHz ...