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TMS320C28341
TMS320C28341 | |
|---|---|
| Manufacturer Part Number | TMS320C28341 |
| Description | The TMS320C2834x (C2834x) Delfino™ microcontroller (MCU) devices build on TI's existing F2833x high-performance floating-point microcontrollers |
| Manufacturer | Texas Instruments |
| TMS320C28341 datasheets |
|
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Specifications of TMS320C28341 | |||
|---|---|---|---|
| Cpu | C28x | Peak Mmacs | 200 |
| Fpu | Yes | Frequency(mhz) | 200 |
| Ram(kb) | 196 | Emif | 1 32/16-Bit |
| Dma(ch) | 1 6-Ch DMA | Pwm(ch) | 12 |
| Cap/qep | 4/2 | Mcbsp | 1 |
| I2c | 1 | Uart(sci) | 3 |
| Spi | 2 | Can | 2 |
| Timers | 3 32-Bit CPU,1 WD | Gpio | 88 |
| Pin/package | 179BGA MICROSTAR, 256BGA | Operating Temperature Range(c) | -40 to 105,-40 to 125 |
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Table 6-15. STANDBY Mode Timing Requirements
Pulse duration, external
t
w(WAKE-INT)
wake-up signal
(1) QUALSTDBY is a 6-bit field in the LPMCR0 register.
Table 6-16. STANDBY Mode Switching Characteristics
PARAMETER
Delay time, IDLE instruction
t
d(IDLE-XCOL)
executed to XCLKOUT low
Delay time, external wake
t
signal to program execution
d(WAKE-STBY)
(1)
resume
•
Wake up from SARAM
(1) This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up signal) involves additional latency.
(A)
Device
Status
Flushing Pipeline
Wake-up
Signal
X1/X2 or
X1 or
XCLKIN
XCLKOUT
A.
IDLE instruction is executed to put the device into STANDBY mode.
B.
The PLL block responds to the STANDBY signal. SYSCLKOUT is held for 32 cycles before being turned off. This
delay enables the CPU pipeline and any other pending operations to flush properly. If an access to XINTF is in
progress and its access time is longer than this number then it will fail. It is recommended to enter STANDBY mode
from SARAM without an XINTF access in progress.
C.
Clock to the peripherals are turned off. However, the PLL and watchdog are not shut down. The device is now in
STANDBY mode.
D.
The external wake-up signal is driven active.
E.
After a latency period, the STANDBY mode is exited.
F.
Normal execution resumes. The device will respond to the interrupt (if enabled).
Figure 6-12. STANDBY Entry and Exit Timing Diagram
Copyright © 2009–2011, Texas Instruments Incorporated
focus.ti.com:
TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342, TMS320C28341
TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
TEST CONDITIONS
Without input qualification
(1)
With input qualification
(2 + QUALSTDBY) * t
TEST CONDITIONS
MIN
32t
c(SCO)
Without input qualifier
With input qualifier
(C)
(D)
(B)
STANDBY
STANDBY
t
w(WAKE-INT)
t
t
d(IDLE−XCOL)
Submit Documentation Feedback
SPRS516C – MARCH 2009 – REVISED JULY 2011
MIN
NOM
MAX
UNIT
3t
c(OSCCLK)
cycles
c(OSCCLK)
TYP
MAX
UNIT
45t
cycles
c(SCO)
cycles
100t
c(SCO)
cycles
100t
+ t
c(SCO)
w(WAKE-INT)
(E)
(F)
Normal Execution
d(WAKE-STBY)
Electrical Specifications
127
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