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TMS320C28341
TMS320C28341 | |
|---|---|
| Manufacturer Part Number | TMS320C28341 |
| Description | The TMS320C2834x (C2834x) Delfino™ microcontroller (MCU) devices build on TI's existing F2833x high-performance floating-point microcontrollers |
| Manufacturer | Texas Instruments |
| TMS320C28341 datasheets |
|
Availability: In stock
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Specifications of TMS320C28341 | |||
|---|---|---|---|
| Cpu | C28x | Peak Mmacs | 200 |
| Fpu | Yes | Frequency(mhz) | 200 |
| Ram(kb) | 196 | Emif | 1 32/16-Bit |
| Dma(ch) | 1 6-Ch DMA | Pwm(ch) | 12 |
| Cap/qep | 4/2 | Mcbsp | 1 |
| I2c | 1 | Uart(sci) | 3 |
| Spi | 2 | Can | 2 |
| Timers | 3 32-Bit CPU,1 WD | Gpio | 88 |
| Pin/package | 179BGA MICROSTAR, 256BGA | Operating Temperature Range(c) | -40 to 105,-40 to 125 |
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TMS320C28346, TMS320C28345, TMS320C28344
TMS320C28343, TMS320C28342, TMS320C28341
SPRS516C – MARCH 2009 – REVISED JULY 2011
3.1
Memory Maps
In
Figure 3-2
through
Figure
•
Memory blocks are not to scale.
•
Peripheral Frame 0, Peripheral Frame 1, Peripheral Frame 2, and Peripheral Frame 3 memory maps
are restricted to data memory only. A user program cannot access these memory maps in program
space.
•
Protected means the order of "Write followed by Read" operations is preserved rather than the pipeline
order. See the TMS320x2834x Delfino System Control and Interrupts Reference Guide (literature
number SPRUFN1) for more details.
•
Certain memory ranges are EALLOW protected against spurious writes after configuration.
•
If the eCAN module is not used in an application, the RAM available (LAM, MOTS, MOTO, and
mailbox RAM) can be used as general-purpose RAM. The CAN module clock should be enabled for
this.
36
Functional Overview
focus.ti.com:
TMS320C28346, TMS320C28345, TMS320C28344 TMS320C28343, TMS320C28342, TMS320C28341
3-4, the following apply:
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Copyright © 2009–2011, Texas Instruments Incorporated
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