NL27WZ125USG ON Semiconductor, NL27WZ125USG Datasheet - Page 4

IC BUFFER DL TRI-ST NON-INV US8

NL27WZ125USG

Manufacturer Part Number
NL27WZ125USG
Description
IC BUFFER DL TRI-ST NON-INV US8
Manufacturer
ON Semiconductor
Series
27WZr
Datasheet

Specifications of NL27WZ125USG

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
US8, 8-VSSOP
Package
8US
Logic Family
LCX
Logic Function
Buffer/Line Driver
Number Of Outputs Per Chip
2
Output Type
3-State
Input Signal Type
Single-Ended
Maximum Propagation Delay Time @ Maximum Cl
5.7@3.3V|5@5V ns
Polarity
Non-Inverting
Number Of Channels Per Chip
Dual
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
1 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
250 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
3
Propagation Delay Time
5.7 ns @ 3.3 V or 5 ns @ 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NL27WZ125USGOS
NL27WZ125USGOS
NL27WZ125USGOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NL27WZ125USG
Manufacturer:
ON
Quantity:
24 000
Company:
Part Number:
NL27WZ125USG
Quantity:
480
7. C
CAPACITIVE CHARACTERISTICS
Symbol
t
OUTPUT Y
f
INPUT
A and B
C
C
Average operating current can be obtained by the equation: I
power consumption; P
= 3 ns
C
OUT
PD
PD
IN
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
A 1 MHz square input wave is recommended for
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
(Note 7)
INPUT
Figure 3. Switching Waveform
t
PHL
10%
50%
Figure 6. T
90%
propagation delay tests.
50%
D
C
= C
L
90%
= 50 pF
PD
50%
OE
Parameter
On
On
PZL
 V
50%
2
CC
t
or T
PLH
Figure 5. AC Output Enable and Disable Waveform
t
2
t
PZH
PZL
10%
V
 f
PL
CC
R
R
in
t
f
1
L
= 3 ns
+ I
= 500 W
= 500 W
CC
OUTPUT
 V
50%
V
GND
V
V
CC
CC
OH
OL
.
http://onsemi.com
50%
50%
CC(OPR
V
V
10 MHz, V
10 MHz, V
t
t
PHZ
PLZ
CC
CC
4
)
= C
= 5.5 V, V
= 5.5 V, V
PD
INPUT
CC
CC
 V
V
CC
CC
50%
= 3.3 V, V
= 5.5 V, V
*Includes all probe and jig capacitance.
I
I
A 1 MHz square input wave is recommended for
A 1 MHz square input wave is recommended for
= 0 V or V
= 0 V or V
 f
in
INPUT
Condition
+ I
CC
I
I
OE = GND
= 0 V or V
= 0 V or V
Figure 4. T
Figure 7. T
CC
CC
. C
propagation delay tests.
propagation delay tests.
V
V
PD
V
OH
GND
CC
OL
≈ 0 V
≈ V
is used to determine the no−load dynamic
V
0 V
− 10%
C
+ 10%
CC
L
CC
CC
CC
= 50 pF
PLH
PZH
C
L
or T
or T
*
PHL
PHZ
R
L
= 250 W
OUTPUT
R
Typical
L
7.0
7.0
18
27
OUTPUT
Unit
pF
pF
pF

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