FAN9611 Fairchild Semiconductor, FAN9611 Datasheet

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FAN9611

Manufacturer Part Number
FAN9611
Description
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2008 Fairchild Semiconductor Corporation
FAN9611 / FAN9612 • Rev. 1.1.4
FAN9611 / FAN9612
Interleaved Dual BCM PFC Controllers
Features
Applications
Sync-Lock™ Interleaving Technology for 180°
Out-of-Phase Synchronization Under All Conditions
Automatic Phase Disable at Light Load
Dead-Phase Detect Protection
2.0A Sink, 1.0A Source, High-Current Gate Drivers
High Power Factor, Low Total Harmonic Distortion
Voltage-Mode Control with (V
Closed-Loop Soft-Start with User-Programmable
Soft-Start Time for Reduced Overshoot
Minimum Restart Frequency to Avoid Audible Noise
Maximum Switching Frequency Clamp
Brownout Protection with Soft Recovery
Non-Latching OVP on FB Pin and Latching Second-
Level Protection on OVP Pin
Open-Feedback Protection
Power-Limit and Current Protection for Each Phase
Low Startup Current of 80µA Typical
Works with DC and 50Hz to 400Hz AC Inputs
100-1000W AC-DC Power Supplies
Large Screen LCD-TV, PDP-TV, RP-TV Power
High-Efficiency Desktop and Server Power Supplies
Networking and Telecom Power Supplies
Solar Micro Inverters
IN
)
2
Figure 1. Simplified Application Diagram
Feedforward
Description
The FAN9611/12 family of interleaved dual Boundary-
Conduction-Mode (BCM) Power-Factor-Correction (PFC)
controllers operate two parallel-connected boost power
trains 180° out of phase. Interleaving extends the
maximum practical power level of the control technique
from about 300W to greater than 800W. Unlike the
continuous conduction mode (CCM) technique often
used at higher power levels, BCM offers inherent zero-
current switching of the boost diodes, which permits the
use of less expensive diodes without sacrificing
efficiency. Furthermore, the input and output filters can
be smaller due to ripple current cancellation and effective
doubling of the switching frequency.
The converters operate with variable frequency, which is
a function of the load and the instantaneous input /
output voltages. The switching frequency is limited
between 16.5kHz and 525kHz. The Pulse Width
Modulators (PWM) implement voltage-mode control with
input voltage feedforward. When configured for PFC
applications, the slow voltage regulation loop results in
constant on-time operation within a line cycle. This PWM
method, combined with the BCM operation of the boost
converters, provides automatic power factor correction.
The controllers offers bias UVLO (10V / 7.5V for
FAN9611 and 12.5V / 7.5V for FAN9612), input
brownout, over-current, open-feedback, output over-
voltage, and redundant latching over-voltage protections.
Furthermore, the converters’ output power is limited
independently of the input RMS voltage. Synchronization
between the power stages is maintained under all
operating conditions.
December 2011
www.fairchildsemi.com

Related parts for FAN9611

FAN9611 Summary of contents

Page 1

... BCM operation of the boost converters, provides automatic power factor correction. The controllers offers bias UVLO (10V / 7.5V for FAN9611 and 12.5V / 7.5V for FAN9612), input brownout, over-current, open-feedback, output over- voltage, and redundant latching over-voltage protections. Furthermore, the converters’ output power is limited independently of the input RMS voltage ...

Page 2

... PCB design and operating conditions, such as air flow. The range of values JA covers a variety of operating conditions utilizing natural convection with no heatsink on the package. 3. This typical range is an estimate; actual values depend on the application. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Package Figure 2. SOIC-16 (Top View) Suffix (1) Θ ...

Page 3

... Typical Application Diagram LINE EMI Filter R INHYST Block Diagram © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 R ZCD2 R IN1 R ZCD1 1 ZCD1 CS1 ZCD2 CS2 15 IN2 C 5VB 3 14 5VB VDD 4 13 MOT DRV1 R R MOT G1 5 AGND ...

Page 4

... CS2 Current Sense Input for Phase 2 of the interleaved boost power stage. 16 CS1 Current Sense Input for Phase 1 of the interleaved boost power stage. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Figure 5. Pin Layout (Top-View) Description 4 error amplifier M www.fairchildsemi.com ...

Page 5

... If the mismatch is greater than ±10%, current sharing is proportionately worse, requiring over-design of the power supply. However, the accurate 180° out-of-phase synchronization is still maintained, providing current cancellation, although its effectiveness is reduced. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Parameter Parameter (4) 5 Min ...

Page 6

... Restart Timer (Each Channel) f Minimum Switching Frequency SW,MIN Frequency Clamp (Each Channel) f Maximum Switching Frequency SW,MAX © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = -40°C to +125°C. Currents are defined as positive into the device and J Conditions – 0. Output Not Switching ...

Page 7

... OVPNL_HYS Over-Voltage Protection Using OVP Pin – Latching (Input) V Latching OVP Threshold (+15%) OVPLCH Note: 5. Not tested in production. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Continued ( ) = -40°C to +125°C. Currents are defined as positive into the device and J Conditions ...

Page 8

... There are many fundamental differences in CCM and BCM operations and the respective designs of the boost converter. The FAN9611/12 utilizes the boundary conduction mode control algorithm. The fundamental concept of this operating mode is that the inductor current starts from zero in each switching period, as shown in the lower waveform in Figure 7 ...

Page 9

... Interleaving The FAN9611/12 control IC is configured to control two boost converters connected in parallel, both operated in boundary conduction mode. In this arrangement, the input and output voltages of the two parallel converters are the same and each converter is designed to process approximately half the total output power. ...

Page 10

... PWM comparator turns off the power transistor when the ramp waveform exceeds the control voltage provided by the error amplifier. In the FAN9611/12 and in similar voltage-mode PWMs, the ramp is a linearly rising waveform at one input of the comparator circuit. Figure 13. Conduction Interval Termination ...

Page 11

... By managing the number of phases used at light load, the FAN9611/12 can maintain high efficiency for a wider load range of the power supply. Normal interleaved operation converters resumes automatically once the output power exceeds approximately 18% of the maximum power limit level of the converter ...

Page 12

... The 5V rail is a switched rail actively held LOW when the FAN9611/ under-voltage lockout. Once the UVLO turn-on threshold is exceeded at the VDD pin, the 5V rail is turned on, providing a sharp edge that can be used as an indication that the chip is running ...

Page 13

... Therefore the FB © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 voltage stays flat or even decays while the SS voltage keeps rising. This is a problem if closed-loop soft-start should be maintained. By clamping the SS voltage to the FB pin, this problem can be mitigated ...

Page 14

... If the FB pin is below 0.5V, which would indicate a missing feedback divider (or wrong value causing dangerously-high regulation voltage), the FAN9611/12 does not send out gate drive signals to the boost transistors. Figure 21. Output-Voltage Feedback Circuit © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • ...

Page 15

... If the peak of the sense voltage remains below the 0.925V threshold, input under-voltage or brownout condition is declared and the FAN9611/12 stops operating. When the V IN voltage sense circuit saturates and the feedforward circuit is not able to follow the input any higher. ...

Page 16

... OUT swings between 1/3 to 2/3 V and the MOS devices pull the output to the high DD or low rail. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 50Hz DC 10ms forced reset after 32ms Figure 24. Input Voltage Sensing Waveforms The purpose of the MillerDrive™ architecture is to ...

Page 17

... Bias Supply ( This is the main bias source for the FAN9611/12. The operating voltage range is between 8V and 18V. The V voltage is monitored by the under-voltage lockout DD (UVLO) circuit. At power-up, the V exceed 10.0V (±0.5V) for FAN9611 and exceed 12.5V (±0.5V) for FAN9612 to enable operation. Both the ...

Page 18

... FAN9612 Startup with 12V Bias (Less than UVLO) a sophisticated The FAN9612 (not FAN9611) is designed so that the controller can start even if the auxiliary bias voltage is less than the controller’s under-voltage lockout start threshold. This is useful if the auxiliary power is 12V or below. This configuration also allows bias power designs using a bootstrap winding to start the FAN9612 without a dedicated startup resistor ...

Page 19

... FAN9611/12 is straightforward because the error amplifier reference (the positive input) is available on the soft-start (SS) pin, as shown in Figure 28. In the FAN9611/12 architecture, the power of the converter is proportional to the voltage on the COMP pin, minus a small offset. The voltage on the COMP pin is monitored to determine the operating power of the supply. ...

Page 20

... Disabling the FAN9611/12 There are four ways to disable the FAN9611/12 important to understand how the part reacts for the various shutdown procedures. a. Pull the SS Pin to GND. This method uses the error amplifier to stop the operation of the power supply. By pulling the SS pin to GND, the error amplifier’s non-inverting input is pulled to GND ...

Page 21

... Input Voltage Sensing (  Since the impedance of voltage divider is large and FAN9611/12 detects the peak of the line voltage, the VIN pin can be sensitive to the switching noise. The trace connected to this pin should not cross traces with high di/dt to minimize the interference.  ...

Page 22

... Bypass Capacitor for VDD_HF Startup Energy Storage for V Current Sense Resistor Step 1: Input Voltage Range Name Value FAN9611/12 utilizes a single pin (VIN) for input voltage sensing. The VIN pin must be above 0.925V (V enable operation. The converter turns higher V LINE.ON VIN voltage (V ...

Page 23

... Figure 33. Interleaved BCM PFC Schematic Using FAN9611/12 Step 2: Estimated Conversion Efficiency Use the estimated full-load power conversion efficiency. Typical value for an interleaved BCP PFC converter is in the 0.92 to 0.98 range. The efficiency is in the lower half of the range for low-power applications. Using state-of- ...

Page 24

... CH ensures that parasitic circuit board and pin capacitances do not introduce unwanted filtering effect in the feedback path. If the feedback divider is used to provide startup power for the FAN9611/12 (see AN-6086 for implementation details), the following equation is used to calculate R  R FB2 where 3V is the reference voltage of the error amplifier (11) at its non-inverting input ...

Page 25

... It should also be sufficiently lower then the switching frequency of the © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 converter so noise can be effectively attenuated. The  recommended f (19) applications ...

Page 26

... FAN9611/12. In addition to the high-speed turn-off, another advantage (29) of this circuit is that the FAN9611/12 does not have to sink the high peak discharge current from the MOSFET, reducing the internal power dissipation in the gate drive circuitry by a factor of two. Instead, the current is ...

Page 27

... Typical Performance Characteristics — Supply Typical characteristics are provided at T Figure 37. I vs. Temperature STARTUP Figure 39. UVLO Thresholds vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 38. Operating Current vs. Temperature Figure 40. UVLO Hysteresis vs. Temperature 27 www ...

Page 28

... Typical Performance Characteristics — Control Typical characteristics are provided at T Figure 41. Transfer Function (Maximum On Time vs. V Figure 43. EA Transconductance (g Temperature Figure 45. 5V Reference vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 42. Maximum On Time vs. Temperature ) ...

Page 29

... Typical Performance Characteristics — Control Typical characteristics are provided at T Figure 47. Phase-Control Thresholds vs. Temperature Figure 48. Phase-Dropping Operation © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Gate Drive 1 Gate Drive 1 Gate Drive 2 Gate Drive 2 ...

Page 30

... Typical Performance Characteristics — Protection Typical characteristics are provided at T Figure 50. CS Threshold vs. Temperature Figure 52. Restart Timer Frequency vs. Temperature Figure 54. Brownout Threshold vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 51 OUT Delay vs. Temperature Figure 53 ...

Page 31

... Typical Performance Characteristics — Protection Typical characteristics are provided at T Figure 55. Non-Latching OVP vs. Temperature Figure 57. OVP Hysteresis vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 56. Latching OVP vs. Temperature 31 www.fairchildsemi.com ...

Page 32

... Current Note: 6. For full performance operational characteristics at both low line (110V load and full-load, refer to FEB279 Evaluation Board User Guide: 400W Evaluation Board using FAN9612. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 59 ...

Page 33

... Evaluation Board FEB388: 400W Evaluation Board Using FAN9611/12 FEB388 is an evaluation board for an interleaved dual boundary-conduction-mode PFC converter rated at 400W (400V/1A) power. With phase management, the efficiency is maintained above 96% even down at 10% of the rated output power. The efficiencies for full-load condition exceed 96% as shown below. ...

Page 34

... Controller Related Resources  AN-6086: Design Consideration for Interleaved Boundary Conduction Mode (BCM) PFC Using FAN9612  AN-9717: Fairchild Evaluation Board User Guide FEB388: 400W Evaluation Board using FAN9611/12  AN-8021: Building Variable Output Voltage Boost PFC Converters Using FAN9612 References 1. ...

Page 35

... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 10.00 A 9.80 8.89 ...

Page 36

... Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 36 www.fairchildsemi.com ...

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