FSQ0565RQ Fairchild Semiconductor, FSQ0565RQ Datasheet - Page 17

• Manufacturer Part Number: FSQ0565RQ
• Description: A Quasi-Resonant Converter (QRC) generally shows lower EMI and higher power conversion efficiency than a conventional hard-switched converter with a fixed switching frequency
• Manufacturer: Fairchild Semiconductor

FSQ0565RS/RQ Rev. 1.0.3
© 2008 Fairchild Semiconductor Corporation
PCB Layout Guide
Due to the combined scheme, FPS shows better noise
immunity than conventional PWM
MOSFET discrete solutions. Furthermore, internal drain
current sense eliminates noise generation caused by a
sensing resistor. There are some recommendations for
PCB layout to enhance noise immunity and suppress the
noise inevitable in power-handling components.
There are typically two grounds in the conventional
SMPS: power ground and signal ground. The power
ground is the ground for primary input voltage and
power, while the signal ground is ground for PWM
controller. In FPS, those two grounds share the same
pin, GND. Normally the separate grounds do not share
the same trace and meet only at one point, the GND pin.
More, wider patterns for both grounds are good for large
currents by decreasing resistance.
Capacitors at the V
possible to the corresponding pins to avoid noise from
the switching device. Sometimes Mylar® or ceramic
capacitors with electrolytic for V
operation. The ground of these capacitors needs to
connect to the signal ground (not power ground).
The cathode of the snubber diode should be close to the
Drain pin to minimize stray inductance. The Y-capacitor
between primary and secondary should be directly
connected to the power ground of DC link to maximize
surge immunity.
Because the voltage range of feedback and sync line is
small, it is affected by the noise of the drain pin. Those
traces should not draw across or close to the drain line.
When the heat sink is connected to the ground, it should
be connected to the power ground. If possible, avoid
using jumper wires for power ground and drain.
One-shot
GateX2
FSQ0565 Rev. 00
V
AVS
V
gate
DS
GateX2: Counting V
triggering
fixed
t
B
CC
1st or 2nd is depend on GateX2
and FB pins should be as close as
gate
every 2 pulses independent on other signals .
V
CC
gate
fixed
Figure 37. Alternating Valley Switching (AVS)
continued 2 pulses
is better for smooth
1st valley switching
controller and
de-triggering
t
B
fixed
triggering
V
gate
continued another 2 pulses
t
B
17
2nd valley switching
Mylar® is a registered trademark of DuPont Teijin Films.
fixed
Figure 38. Recommended PCB Layout
Modulation frequency is approximately 17kHz.
1st valley- 2nd valley frequency modulation.
t
B
1st or 2nd is dependent on GateX2
fixed
1st valley switching
t
B
V
gate
fixed
continued 2 pulses
t
B
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