Buck Converter with Bypass Mode for 3G/3.5G/4G PAs
2.7V to 5.5V Input Voltage Range
Range from 0.4V to 3.50V (or V
Small Form Factor Inductor
o 2012 470nH or 540nH for Minimal PCB Area
o 2020 1.0µH for Higher Efficiency
Bypass Dropout at 500mA, 60mV Typical
100% Duty Cycle for Low Dropout Operation
Input Under-Voltage Lockout / Thermal Shutdown
1.34mm x 1.29mm, 9-Bump, 0.4mm-Pitch WLCSP
3MHz / 6MHz Selectable Switching Frequency to
Facilitate System Optimization
High-Efficiency PFM Operation at Low Power
Sleep Mode for Very Low I
Up to 96% Efficient Synchronous Operation at
10µs Output Voltage Step Response for Early
Power Loop Settling
Dynamic Supply Bias for 3G/3.5G and 4G PAs
Power Supply for WCDMA/LTE PAs
For more information or a full copy of this datasheet,
please contact a Fairchild representative.
-40 to +85°C
© 2008 Fairchild Semiconductor Corporation
FAN5903 • Rev. 1.0.7
FAN5903 is a high-efficiency, low-noise, synchronous,
step-down, DC-DC converter designed for powering
3G/3.5G/4G RF Power Amplifiers (PAs) in handsets and
other mobile applications.
The output voltage may be dynamically varied from
0.40V to 3.50V, proportional to an analog input V
ranging from 0.16V to 1.40V provided by an external
DAC. This allows the PA to be supplied with the voltage
that enables maximum power-added efficiency.
An integrated bypass FET automatically switches on
when battery voltage drops close to the desired output
to Synchronous Mode when the voltage dropout
exceeds 375mV. The integrated bypass FET is also
enabled when V
The FAN5903 offers fast transition times, enabling
changes to the output voltage in less than 10µs for
power transitions. Moreover, a Current-Mode control
loop with fast transient response ensures excellent line
and load regulation.
Light-load efficiency is optimized by operating in PFM
Mode for load currents typically less than 100mA.
The switching frequency may be set to 3MHz or 6MHz,
enabling further optimization of system performance.
The FAN5903 typically uses a single, small-form-factor
inductor of 540nH. Efficiency may be further optimized
using a 1.0µH inductor when running at 3MHz.
When output regulation is not required, the FAN5903
may be placed in Sleep Mode by setting V
to 100mV. This ensures a very low I
enabling a fast return to output regulation. The
FAN5903 enables significant current reduction and
increased talk time and is available in a 1.34mm x
1.29mm, 9-bump, 0.40mm-pitch, WLCSP package.
1.34mm x 1.29mm, 9-bump, 0.4mm Pitch,
Wafer-Level Chip-Scale Package (WLCSP)
-200mV). The DC-DC switches back
is nominally greater than to 1.5V.
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