ADCMP553BRM Analog Devices, ADCMP553BRM Datasheet

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ADCMP553BRM

Manufacturer Part Number
ADCMP553BRM
Description
Manufacturer
Analog Devices
Datasheet

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ADCMP553BRM
Manufacturer:
BB
Quantity:
5
FEATURES
Single power supply
500 ps propagation delay input to output
125 ps overdrive dispersion
Differential PECL/LVPECL compatible outputs
Differential latch control
Internal latch pull-up resistors
Power supply rejection greater than 70 dB
700 ps minimum pulse width
Equivalent input rise time bandwidth > 750 MHz
Typical output rise/fall of 500 ps
Programmable hysteresis
APPLICATIONS
Automatic test equipment
High speed instrumentation
Scope and logic analyzer front ends
Window comparators
High speed line receivers
Threshold detection
Peak detection
High speed triggers
Patient diagnostics
Disk drive read channel detection
Hand-held test instruments
Zero-crossing detectors
Line receivers and signal restoration
Clock drivers
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
ADCMP551/ADCMP552/ADCMP553
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The ADCMP551/ADCMP552/ADCMP553 are single-supply,
high speed comparators fabricated on Analog Devices’
proprietary XFCB process. The devices feature a 500 ps
propagation delay with less than 125 ps overdrive dispersion.
Overdrive dispersion, a measure of the difference in
propagation delay under differing overdrive conditions, is a
particularly important characteristic of high speed comparators.
A separate programmable hysteresis pin is available on the
ADCMP552.
A differential input stage permits consistent propagation delay
with a common-mode range from –0.2 V to VCCI – 2.0 V.
Outputs are complementary digital signals and are fully
compatible with PECL and 3.3V LVPECL logic families. The
outputs provide sufficient drive current to directly drive
transmission lines terminated in 50 Ω to VCCO − 2 V. A latch
input is included and permits tracking, track-and-hold, or
sample-and-hold modes of operation. The latch input pins
contain internal pull-ups that set the latch in tracking mode
when left open.
The ADCMP551/ADCMP552/ADCMP553 are specified over
the –40°C to +85°C industrial temperature range. The
ADCMP551 is available in a 16-lead QSOP package; the
ADCMP552 is available in a 20-lead QSOP package; and the
ADCMP553 is available in an 8-lead MSOP package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
PECL/LVPECL Comparators
NONINVERTING
Single-Supply, High Speed
INVERTING
LATCH ENABLE
INPUT
INPUT
INPUT
© 2004 Analog Devices, Inc. All rights reserved.
*ADCMP552 ONLY
Figure 1.
ADCMP551/
ADCMP552/
ADCMP553
HYS*
LATCH ENABLE
INPUT
Q OUTPUT
Q OUTPUT
www.analog.com

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ADCMP553BRM Summary of contents

Page 1

... Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...

Page 2

ADCMP551/ADCMP552/ADCMP553 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Thermal Considerations.............................................................. 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 8 Timing Information ....................................................................... 10 Application Information................................................................ 11 REVISION HISTORY 10/04—Revision 0: Initial Version ...

Page 3

SPECIFICATIONS 25°C, unless otherwise noted. CCI CCO A Table 1. Electrical Characteristics Parameter DC INPUT CHARACTERISTICS Input Voltage Range Input Differential Voltage Range Input Offset Voltage Input Offset Voltage Channel ...

Page 4

ADCMP551/ADCMP552/ADCMP553 Parameter AC PERFORMANCE (continued) Equivalent Input Rise Time Bandwidth Maximum Toggle Rate Minimum Pulse Width RMS Random Jitter Unit-to-Unit Propagation Delay Skew POWER SUPPLY (ADCMP551/ADCMP552) Input Supply Current Output Supply Current Output Supply Current Input Supply Voltage Output Supply ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltages Input Supply Voltage (V to GND) CCI Output Supply Voltage (V to GND) CCO Ground Voltage Differential Input Voltages Input Common-Mode Voltage Differential Input Voltage Input Voltage, Latch Controls Output Output Current ...

Page 6

ADCMP551/ADCMP552/ADCMP553 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS CCO CCO ADCMP551 LEB LEA 4 13 TOP VIEW LEB LEA 5 12 (Not to Scale) AGND CCI –INB ...

Page 7

Pin No. ADCMP551 ADCMP552 ADCMP553 Mnemonic Function LEB One of Two Complementary Inputs for Channel B Latch Enable. In the compare mode (logic low), the output tracks changes at the input ...

Page 8

ADCMP551/ADCMP552/ADCMP553 TYPICAL PERFORMANCE CHARACTERISTICS 25°C, unless otherwise noted. CCI CCO A –5 –6 –7 –8 –9 –10 –0.2 0.1 0.4 0.7 NONINVERTING INPUT VOLTAGE (INVERTING VOLTAGE = 0.5V) Figure 5. ...

Page 9

TEMPERATURE (°C) Figure 11. Propagation Delay vs. Temperature 140 120 100 0.2 0.4 0.6 OVERDRIVE VOLTAGE ...

Page 10

ADCMP551/ADCMP552/ADCMP553 TIMING INFORMATION LATCH ENABLE LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT Q OUTPUT Figure 17 shows the compare and latch features of the ADCMP55x family. Table 4 describes the terms in the diagram. Table 4. Timing Descriptions Symbol Timing ...

Page 11

APPLICATION INFORMATION The comparators in the ADCMP55x series are very high speed devices. Consequently, high speed design techniques must be employed to achieve the best performance. The most critical aspect of any ADCMP55x design is the use of a low ...

Page 12

... This oscillation is due in part to the high input bandwidth of the comparator and the parasitics of the package. Analog Devices recommends a slew rate of 1 V/µs or faster to ensure a clean output transition. If slew rates less than 1 V/µs are used, hysteresis should be added to reduce the oscillation ...

Page 13

TYPICAL APPLICATION CIRCUITS + V IN ADCMP551/ ADCMP552/ ADCMP553 V REF – LATCH V ENABLE CCO INPUTS ALL RESISTORS 50Ω Figure 21. High Speed Sampling Circuits + +V REF ADCMP551/ ADCMP552/ ADCMP553 V IN – + ADCMP551/ ADCMP552/ ADCMP553 –V ...

Page 14

... COMPLIANT TO JEDEC STANDARDS MO-137AB Figure 26. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches ORDERING GUIDE Model Temperature Range ADCMP551BRQ −40°C to +85°C ADCMP552BRQ −40°C to +85°C ADCMP553BRM −40°C to +85°C EVAL-ADCMP551BRQ EVAL-ADCMP552BRQ 0.341 BSC 20 11 0.154 BSC 1 ...

Page 15

NOTES ADCMP551/ADCMP552/ADCMP553 Rev Page ...

Page 16

... ADCMP551/ADCMP552/ADCMP553 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04722–0–10/04(0) Rev Page ...

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