AT24C1024B ATMEL Corporation, AT24C1024B Datasheet

no-image

AT24C1024B

Manufacturer Part Number
AT24C1024B
Description
Manufacturer
ATMEL Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C1024B-PU2.5
Manufacturer:
ATMEL
Quantity:
1 500
Part Number:
AT24C1024B-PU25
Manufacturer:
ATMEL
Quantity:
1 011
Part Number:
AT24C1024B-TH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT24C1024B-TH-T
Quantity:
5 600
Part Number:
AT24C1024B-TH25
Manufacturer:
ATMEL
Quantity:
310
Part Number:
AT24C1024BN-SH-B
Manufacturer:
Atmel
Quantity:
1 200
Part Number:
AT24C1024BN-SH-B
Manufacturer:
AT
Quantity:
4
Part Number:
AT24C1024BN-SH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT24C1024BN-SH25-B
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
AT24C1024BN-SH25-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT24C1024BW-SH-B
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Features
Description
The AT24C1024B provides 1,048,576 bits of serial electrically erasable and program-
mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The
device’s cascadable feature allows up to four devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,
8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is
available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.
Table 1. Pin Configurations
Pin Name
SDA
SCL
WP
NC
A1
A2
Low-voltage Operation
Internally Organized 131,072 x 8
Two-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400 kHz (1.8V) and 1 MHz (5V, 2.5V) Clock Rate
Write Protect Pin for Hardware and Software Data Protection
256-byte Page Write Mode (Partial Page Writes Allowed)
Random and Sequential Read Modes
Self-timed Write Cycle (5 ms Typical)
High Reliability
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-lead Ultra Thin
Small Array (SAP), and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Tape and Reel and Bumped Die
– 1.8V (V
– 2.5V (V
– Endurance: 1,000,000 Write Cycles/Page
– Data Retention: 40 Years
GND
CC
CC
NC
A1
A2
VCC
= 1.8V to 3.6V)
= 2.5V to 5.5V)
SDA
SCL
WP
8-lead dBGA2
8-lead SOIC
Bottom View
Function
Address Input
Address Input
Serial Data
Serial Clock Input
Write Protect
No Connect
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
NC
A1
A2
GND
VCC
WP
SCL
SDA
GND
GND
NC
A1
A2
8-lead Ultra-Thin SAP
NC
A1
A2
VCC
SDA
SCL
WP
8-lead TSSOP
8-lead PDIP
Bottom View
1
2
3
4
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
8
7
6
5
NC
A1
A2
GND
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Two-wire Serial
EEPROM
1M (131,072 x 8)
AT24C1024B
with Two Device
Address Inputs
Preliminary
Rev. 5194D–SEEPR–5/07
1

Related parts for AT24C1024B

AT24C1024B Summary of contents

Page 1

... Die Sales: Wafer Form, Tape and Reel and Bumped Die Description The AT24C1024B provides 1,048,576 bits of serial electrically erasable and program- mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to four devices to share a common two-wire bus ...

Page 2

... Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram 2 AT24C1024B [Preliminary] 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 3

... V mends connecting the pin to GND. Switching software write-protect function. Memory AT24C1024B, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address. Organization 5194D–SEEPR–5/07 plane is < ...

Page 4

... IH V Output Low Level OL1 V Output Low Level OL2 Note min and V max are reference only and are not tested AT24C1024B [Preliminary 25° 1.0 MHz –40°C to +85° Test Condition V = 5.0V READ at 400 kHz 5.0V WRITE at 400 kHz ...

Page 5

Table 4. AC Characteristics (Industrial Temperature) Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High ...

Page 6

... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C1024B features a low-power standby mode which is enabled: a) upon power-up and b) after the receipt of the stop bit and the completion of any internal operations ...

Page 7

Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a valid stop condition of a write sequence to the end of ...

Page 8

... Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C1024B has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin Write BYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word address ...

Page 9

PAGE WRITE: The 1024K EEPROM is capable of 256-byte page writes. A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. ...

Page 10

... The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (see Figure 12 on page 12). AT24C1024B [Preliminary] 10 5194D–SEEPR–5/07 ...

Page 11

Figure 7. Device Address Figure 8. Byte Write Figure 9. Page Write P 0 Figure 10. Current Address Read 5194D–SEEPR–5/ MOST LEAST SIGNIFICANT SIGNIFICANT P 0 MOST LEAST SIGNIFICANT SIGNIFICANT 11 ...

Page 12

... Figure 11. Random Read P 0 Figure 12. Sequential Read High Byte ADDRESS P 0 AT24C1024B [Preliminary] 12 High Byte Low Byte ADDRESS ADDRESS Low Byte ADDRESS Data Data Data 5194D–SEEPR–5/07 ...

Page 13

... Ordering Information Ordering Code AT24C1024B-PU (Bulk form only) AT24C1024B-PU25 (Bulk form only) (1) AT24C1024BN-SH-B (NiPdAu Lead Finish) (2) AT24C1024BN-SH-T (NiPdAu Lead Finish) (1) AT24C1024BN-SH25-B (NiPdAu Lead Finish) (2) AT24C1024BN-SH25-T (NiPdAu Lead Finish) (1) AT24C1024BW-SH-B (NiPdAu Lead Finish) (2) AT24C1024BW-SH-T (NiPdAu Lead Finish) (1) AT24C1024BW-SH25-B (NiPdAu Lead Finish) (2) AT24C1024BW-SH25-T ...

Page 14

... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024B [Preliminary ...

Page 15

JEDEC SOIC TOP VIEW TOP VIEW e e SIDE VIEW SIDE VIEW Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. ...

Page 16

... It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024B [Preliminary TOP VIEW ...

Page 17

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 18

... A1 BALL PAD CORNER e (e1) 5. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C1024B [Preliminary TOP VIEW A1 BALL PAD CORNER (d1) BOTTOM VIEW ...

Page 19

SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5194D–SEEPR–5/07 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...

Page 20

... Revision History Doc. No. 5194D 5194C 5194B 5194A AT24C1024B [Preliminary] 20 Date Comments 5/2007 Changed ‘Advance Information’ to ‘Preliminary’ 4/2007 Reduced Pin Configuration sizes Changed Maximum Operating Voltage from 6.0 to 6.25 Removed Device Power Up & Power Down Recommendation Added A2 bit to Device Addressing Removed LSB from Figure 10 Current Address Read ...

Page 21

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. ©2007 Atmel Corporation. All rights reserved. Atmel poration or its subsidiaries. Other terms and product names may be trademarks of others. ...

Related keywords