DM74ALS244AN Fairchild Semiconductor, DM74ALS244AN Datasheet

DM74ALS244AN

Manufacturer Part Number

DM74ALS244AN

Description

IC BUFF/DVR TRI-ST DUAL 20DIP

Manufacturer

Fairchild Semiconductor

Series

74ALSr

Datasheets

1.DM74ALS244AN.pdf (6 pages)

2.DM74ALS244AN.pdf (6 pages)

Specifications of DM74ALS244AN

Logic Type

Buffer/Line Driver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

15mA, 24mA

Voltage - Supply

4.5 V ~ 5.5 V

Operating Temperature

0°C ~ 70°C

Mounting Type

Through Hole

Package / Case

20-DIP (0.300", 7.62mm)

Logic Family

ALS

Number Of Channels Per Chip

Polarity

Non-Inverting

Supply Voltage (max)

5.5 V

Supply Voltage (min)

4.5 V

Maximum Operating Temperature

+ 70 C

Mounting Style

Through Hole

High Level Output Current

- 15 mA

Low Level Output Current

24 mA

Minimum Operating Temperature

0 C

Number Of Lines (input / Output)

8 / 1

Output Type

3-State

Propagation Delay Time

10 ns at 4.5 V to 5.5 V

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

74ALS244

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

DM74ALS244AN

Quantity:

450

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DM74ALS244AWM

DM74ALS244ASJ

DM74ALS244AMSA

DM74ALS244AN

DM74ALS244A

Octal 3-STATE Bus Driver

General Description

This octal 3-STATE bus driver is designed to provide the

designer with flexibility in implementing a bus interface with

memory, microprocessor, or communication systems. This

device offers 64-extended temperature Grade product

guaranteeing performance from 40 C to 85 C. The out-

put 3-STATE gating control is organized into two separate

groups of four buffers, and both control inputs enable the

respective outputs when set logic LOW. The 3-STATE cir-

cuitry contains a feature that maintains the buffer outputs in

3-STATE (high impedance state) during power supply

ramp-up or ramp-down. This eliminates bus glitching prob-

lems that arise during power-up and power-down.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Order Number

LOW Level Logic State

High Impedance (OFF) State

HIGH Level Logic State

Don't Care (Either LOW or HIGH Level Logic State)

Input

Package Number

MSA20

M20D

M20B

N20A

Output

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DS006212

Features

Logic Diagram

Advanced low power oxide-isolated ion-implanted

Schottky TTL process

Functional and pin compatible with the 74LS counterpart

Improved switching performance with less power dissi-

pation compared with the 74LS counterpart

Switching response specified into 500 and 50 pF load

Switching response specifications guaranteed over full

temperature and V

PNP input design reduces input loading

Package Description

supply range

September 1986

Revised February 2000

www.fairchildsemi.com

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