CS4398 Cirrus Logic, Inc., CS4398 Datasheet
CS4398
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CS4398 Summary of contents
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... This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice. Copyright © (All Rights Reserved) CS4398 ultibit lte r ...
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... It also offers an optional path for direct DSD conversion by di- rectly using the multi-element switched capacitor array. The CS4398 accepts PCM data at sample rates from 32 kHz to 200 kHz, DSD audio data, has selectable dig- ital filters, consumes little power, and delivers excellent sound quality ...
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... Mute Control - Register 04h ............................................................................................. 30 7.5 Channel A Volume Control - Register 05h ....................................................................... 31 7.6 Channel B Volume Control - Register 06h ....................................................................... 31 7.7 Ramp and Filter Control - Register 07h ............................................................................ 31 7.8 Misc. Control - Register 08h ............................................................................................. 34 7.9 Misc. Control - Register 09h ............................................................................................. 35 8. PARAMETER DEFINITIONS .................................................................................................. 36 9. REFERENCES ........................................................................................................................ 36 10. PACKAGE DIMENSIONS .................................................................................................... 37 10.1 28-TSSOP ..................................................................................................................... 37 11. APPENDIX ............................................................................................................................ 38 DS568A1 .................................................................................. 16 CS4398 3 ...
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... Figure 1. Pinout Drawing CS4398 DSD_A VLS VQ AMUTEC AOUTA- AOUTA+ VA AGND AOUTB+ AOUTB- BMUTEC VREF REF_GND FILT Patent Rights to use DS568A1 ...
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... C) / Control Data Input (SPI) (Input) - AD1 is a chip address pin Control Data Output (SPI) (Input/Output) - SDA is a data I/O line Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I CS4398 2 C mode; CDIN mode ...
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... Control port interface V not guaranteed at these extremes. (AGND = 0V; all voltages with respect to Min Typ Max VA 4.75 5.0 5.25 4.75 5.0 5.25 VD 3.1 3.3 5.25 VLS 1.7 5.0 5.25 VLC 1.7 5.0 5. Min Max VA -0.3 6.0 -0.3 6.0 VD -0.3 6.0 VLS -0.3 6.0 -0.3 6 ±10 in -0.3 VLS+ 0.4 IN-LS -0.3 VLC+ 0.4 IN-LC T -55 125 A T -65 150 stg CS4398 Units °C Units °C °C DS568A1 ...
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... THD+N 24-bit 0 dB -20 dB -60 dB 16-bit 0 dB (Note 2) -20 dB -60 dB A-Weighted unweighted (Note 3) THD - kHz) ICGM PCM, DSD processor Direct DSD mode Z OUT CS4398 Min Typ Max 114 120 - 111 117 - - -105 - -94 - ...
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... kHz - Fs = 44.1 kHz - kHz - to -0.01 dB corner corner 0 -0.01 .583 (Note kHz - to -0.01 dB corner corner 0 -0.01 .635 (Note kHz - CS4398 The Typ Max Unit - .454 Fs - .499 Fs - +0. 9.4/ ±0.56/ ±0. ±0. ±0.09 ...
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... Min corner 0 -0. -0.1 dB corner corner 0 -0.1 CS4398 (cont.) Typ Max Unit - 0.417 Fs - 0.499 Fs - +0. 6.65/ ±0.29/ ±0. ±0.14 ...
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... Figure 2. Serial Mode Input Timing Min Typ Max 100 100 - 200 40% - 60% 45 -------------------- - ( ) Fs 128 ----------------- - ( ) ------------------ M CLK sclkh slrs t sclkl t sdh CS4398 Units kHz kHz kHz DS568A1 ...
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... MSB - Figure 4. Format 24-bit Data + Format 3, Right Justified 24-Bit Data. CS4398 LSB R igh ...
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... AGND = DGND; Logic 1 = VLS Volts; Symbol t sclkl t sclkh (64x Oversampled) (128x Oversampled) t sdlrs t sdh t dpm t t sclkl t t sdlrs sdh Phase Modulation mode CS4398 Min Typ Max Unit 160 - - 160 - - 1.024 - 3.2 MHz 2.048 - 6.4 MHz ...
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... SCL dst fc t sust Format CS4398 (Inputs: Unit kHz ns µs µs µs µs µs µs ns µs ns µ top ...
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... Hi-Im pedance t csc do CS4398 Unit MHz ns ns µ DS568A1 ...
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... 3 3 kHz) PSRR (60 Hz Qmax (Note 21 Symbol I in Symbol V Serial I Control I Serial I/O V Control I/O CS4398 Min Typ Max - 1 258 340 - 192 240 - 200 - ...
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... SCLK LRCK SDIN VLS DSD_SCLK DSD_A DSD_B CS4398 VLC M0 (AD0/CS) M1 (SDA/CDOUT) M2 (SCL/CCLK) M3 (AD1/CDIN) RST DGND AGND Figure 10. Typical Connection Diagram CS4398 0 AMUTEC Left Channel Analog AOUTA - Conditioning and Mute AOUTA+ AOUTB+ Right Channel Analog AOUTB - Conditioning and Mute BMUTEC ...
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... The external mute circuitry needs to be self biased into an active state in order to be muted during reset. Upon release of reset, the CS4398 will detect the status of the MUTEC pins (high or low) and will then select that state as the polarity to drive when the mutes become active. The external-bias voltage level that the MUTEC pins see at the time of release of reset must meet the “ ...
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... Oversampling Modes The CS4398 operates in one of three oversampling modes based on the input sample rate. Single-Speed mode supports input sample rates kHz and uses a 128x oversampling ratio. Double-Speed mode supports input sample rates up to 100 kHz and uses an oversampling ratio of 64x. Quad-Speed mode supports input sample rates up to 200 kHz and uses an oversampling ratio of 32x ...
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... DESCRIPTION Left Justified 24-bit data 24-bit data Right Justified, 16-bit Data Right Justified, 24-bit Data DESCRIPTION 18 MCLK cycles. CS4398 MCLKDIV2 MCLKDIV3 768x 1024x* 1152x* 24.5760 32.7680 36.8640 33.8688 45.1584 - 36.8640 49.1520 - 384x 512x ...
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... Interpolation Filter (Control Port Mode) To accommodate the increasingly complex requirements of digital audio systems, the CS4398 incorporates selectable interpolation filters. A fast and a slow roll-off filter are available in each of Single, Double, and Quad Speed modes. These filters have been designed to accommodate a variety of musical tastes and styles ...
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... CS4398, but may lower the sensitivity to board level routing of the DSD data signals. The CS4398 can detect errors in the DSD data which does not comply to the SACD specification. The STATIC_DSD and INVALID_DSD bits (Reg. 09h) allow the CS4398 to alter the incoming invalid DSD data. ...
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... Format Selection The Control Port has 2 formats: SPI and operation is desired, AD0/CS should be tied to VLC or GND. If the CS4398 ever detects a high to low transition on AD0/CS after power-up, SPI format will automatically be selected Format Format, SDA is a bidirectional data line ...
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... tio rite , 5.5 SPI Format In SPI format the CS4398 chip select signal, CCLK is the Control Port bit clock, CDIN is the input data line from the microcontroller, CDOUT is the output data line and the chip address is 1001100. CS, CCLK and CDIN are all inputs and data is clocked in on the rising edge of CCLK ...
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... CS high. The CDOUT line will high impedance state once CS goes high Figure 16. Control Port Timing, SPI Format (Read yte 1 CS4398 D ATA yte n DS568A1 ...
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... PART0 REV2 REV1 DEM1 DEM0 FM1 ATAPI2 ATAPI1 Reserved MUTEP1 VOL3 VOL2 VOL1 VOL3 VOL2 VOL1 Reserved Reserved INVALID_ DSD_PM_MODE DSD_PM_EN DSD DSD CS4398 0 REV0 - FM0 0 ATAPI0 1 MUTEP0 0 VOL0 0 VOL0 0 DIR_DSD 0 Reserved ...
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... DESCRIPTION 0 Left Justified 24-bit data 24-bit data 0 Right Justified, 16-bit data Right Justified, 24-bit data 1 0 Right Justified, 20-bit data 1 Right Justified, 18-bit data 0 Reserved 1 Reserved CS4398 REV2 REV1 REV0 - - - DEM0 FM1 FM0 FORMAT ...
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... DSD data with a 3x MCLK to DSD data rate 0 128x oversampled DSD data with a 4x MCLK to DSD data rate 1 128x oversampled DSD data with a 6x MCLK to DSD data rate . BITS 3-2 BITS 1-0 DESCRIPTION Gain dB T1=50 µs 0dB -10dB F1 F2 3.183 kHz 10.61 kHz Figure 17. De-Emphasis Curve CS4398 µs Frequency 27 ...
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... When set to 0 (default), this function is disabled. 7.3.4 ATAPI CHANNEL MIXING AND MUTING (ATAPI4:0) Default = 01001 - AOUTA=aL, AOUTB=bR (Stereo) Function: The CS4398 implements the channel mixing functions of the ATAPI CD-ROM specification. Refer to Ta- ble 7 and Figure 18 for additional information. Left Channel Audio Data Right Channel ...
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... CS4398 AOUTB MUTE MUTE MUTE bR MUTE bL MUTE b[(L+R)/2] aR MUTE b[(L+R)/2] aL MUTE b[(L+R)/2] MUTE bR bL b[(L+R)/2] MUTE MUTE MUTE bR MUTE bL MUTE [(aL+bR)/2] aR MUTE aR bR ...
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... Volume and Mixing Control register. The corresponding MUTEC pin will go active following any ramping due to the soft and zero cross function. When set to 0 (default) this function is disabled MUTE_A MUTE_B BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 CS4398 Reserved MUTEP1 MUTEP0 DS568A1 ...
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... VOL5 VOL4 VOL3 BITS 7-0 Table 8. Example Digital Volume Settings Binary Code Decimal Value 00000000 0 00000001 1 00000110 6 11111111 255 RMP_DN Reserved CS4398 VOL2 VOL1 VOL0 Volume Setting 0 dB -0.5 dB -3.0 dB -128 FILT_SEL Reserved DIR_DSD ...
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... The zero cross function is independently monitored and implemented for each channel. 32 PCM description Immediate Change Zero Cross Soft Ramp Soft Ramp on Zero Crossings CS4398 BITS 7-6 DSD description Immediate Change Soft Ramp DS568A1 ...
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... In this mode the full scale DSD and PCM levels will not be matched (see Section 2), the dynamic range performance may be reduced, the volume control is inactive, and the 50kHz low pass filter is not available (see section 2 for filter specifications). DS568A1 BIT 5 BIT 4 BIT 2 BIT 0 CS4398 33 ...
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... When set to 1, the MCLKDIV bit enables a circuit which divides the externally applied MCLK signal by 3 prior to all other internal circuitry. When set to 0 (default), MCLK is unchanged MCLKDIV2 MCLKDIV3 BIT 7 BIT 6 BIT 5 CS4398 2 1 Reserved Reserved 0 0 BIT 4 BIT 3 0 Reserved 0 DS568A1 ...
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... When set to 1, DSD phase modulation input mode is enabled and the DSD_PM_MODE bit should be set accordingly. When set to 0 (default), this function is disabled (DSD normal mode). DS568A1 4 3 Reserved STATIC_DSD INVALID_DSD 0 1 BIT 3 BIT 2 CS4398 2 1 DSD_PM_MODE DSD_PM_EN 0 0 BIT 1 BIT ...
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... The change in gain value with temperature. Units in ppm/°C. 9. REFERENCES 1. CDB4398 Evaluation Board Datasheet 2. “Design Notes for a 2-Pole Filter with Differential Input”. Cirrus Logic Application Note AN48 2 3. The I C-Bus Specification: Version 2.0” Philips Semiconductors, December 1998. http://www.semiconductors.philips.com “ 36 CS4398 DS568A1 ...
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... JEDEC #: MO-153 Controlling Dimension is Millimeters. Symbol 28-TSSOP END VIEW L PLANE MILLIMETERS NOM MAX -- -- 1.20 0.10 0.15 0.90 1.00 0.245 0.30 9.70 BSC 9.80 BSC 6.40 6.50 4.40 4.50 -- 0.65 BSC -- 0.60 0.75 0° 4° 8° Min Typ Max θ θ CS4398 ∝ NOTE 2 Units °C/Watt °C/Watt 37 ...
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... Figure 21. Single Speed (fast) Transition Band 0.02 0.015 0.01 0.005 0 −0.005 −0.01 −0.015 −0.02 0.52 0.53 0.54 0.55 0 0.05 Figure 23. Single Speed (fast) Passband Ripple 0 −20 −40 −60 −80 −100 −120 0.8 0.9 1 0.4 0.42 Figure 25. Single Speed (slow) Transition Band CS4398 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) DS568A1 0.6 0.5 0.6 ...
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... Figure 27. Single Speed (slow) Passband Ripple 100 120 0.8 0.9 1 0.4 Figure 29. Double Speed (fast) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 Figure 31. Double Speed (fast) Passband Ripple 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 Frequency(normalized to Fs) 0.42 0.44 0.46 0.48 0.5 0.52 0.54 0.56 Frequency(normalized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 Frequency(normalized to Fs) CS4398 0.45 0.5 0.58 0.6 0.45 0.5 39 ...
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... Figure 36. Quad Speed (fast) Stopband Rejection 100 120 0.2 0.7 0.8 0.9 1 Figure 33. Double Speed (slow) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 Figure 35. Double Speed (slow) Passband Ripple 100 120 0.2 0.7 0.8 0.9 1 Figure 37. Quad Speed (fast) Transition Band CS4398 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 Frequency(normalized to Fs) 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0.8 0.35 0.8 DS568A1 ...
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... Figure 42. Quad Speed (slow) Transition Band (detail) DS568A1 0.2 0.15 0.1 0.05 0 0.05 0.1 0.15 0.2 0 0.52 0.53 0.54 0.55 Figure 39. Quad Speed (fast) Passband Ripple 100 120 0.1 0.7 0.8 0.9 1 Figure 41. Quad Speed (slow) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.51 0.52 0.53 0.54 0.55 0 Figure 43. Quad Speed (slow) Passband Ripple 0.05 0.1 0.15 0.2 Frequency(normalized to Fs) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Frequency(normalized to Fs) 0.02 0.04 0.06 0.08 0.1 Frequency(normalized to Fs) CS4398 0.25 0.9 0.12 41 ...
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