HT48R06A-1 Holtek, HT48R06A-1 Datasheet
HT48R06A-1
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HT48R06A-1 Summary of contents
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... Two-level subroutine nesting Bit manipulation instruction Powerful instructions: 62 for HT48R05A-1/HT48C05 63 for HT48R06A-1/HT48C06 and HT48R08A-1 Low voltage reset function 16-pin SSOP/NSOP package 18-pin DIP/SOP package The advantages of low power consumption, I/O flexibil- ity, timer functions, oscillator options, HALT and ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Block Diagram Pin Assignment Rev. 1.50 2 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Pin Description Pin Name I/O Options Bidirectional 8-bit input/output port. Each bit can be configured as wake-up Pull-high* input by options. Software instructions determine the CMOS output or PA0~PA7 I/O Wake-up Schmitt trigger input with a pull-high resistor (determined by pull-high op- tions). Bidirectional 3-bit input/output port. Software instructions determine the ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Symbol Parameter I Standby Current (WDT Enabled) STB1 I Standby Current (WDT Disabled) STB2 Input Low Voltage for I/O Ports, V IL1 TMR and INT Input High Voltage for I/O Ports, V IH1 TMR and INT V Input Low Voltage (RES) IL2 V Input High Voltage (RES) ...
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... Note: *10~*0: Program Counter bits #10~#0: Instruction code bits For HT48R05A-1/HT48C05, the Program Counter is 9 bits wide, i.e. from *8~*0 For HT48R06A-1/HT48C06, the Program Counter is 10 bits wide, i.e. from *9~*0 For HT48R08A-1, the Program Counter is 11 bits wide, i.e. from *10~*0 Rev. 1.50 incremented by one. The program counter then points to the memory word containing the next instruction code ...
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... Note: *10~*0: Table location bits @7~@0: Table pointer bits For HT48R05A-1/HT48C05, the table address location is 9 bits, i.e. from *8~*0 For HT48R06A-1/HT48C06, the table address location is 10 bits, i.e. from *9~*0 For HT48R08A-1, the table address location is 11 bits, i.e. from *10~*0 Rev. 1.50 Table location Any location in the program memory can be used as look-up tables ...
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... The general purpose data memory, addressed from 60H to 7FH (HT48R05A-1/ HT48C05), 40H to 7FH (HT48R06A-1/HT48C06) or Rev. 1.50 20H to 7FH (HT48R08A-1), is used for data and control information under instruction commands. ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Bit No. Label C is set if the operation results in a carry during an addition operation borrow does not 0 take place during a subtraction operation; otherwise C is cleared also affected by a rotate C through carry instruction set if the operation results in a carry out of the low nibbles in addition or no borrow from ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Bit No. Label 0 EMI Controls the master (global) interrupt (1= enabled; 0= disabled) 1 EEI Controls the external interrupt (1= enabled; 0= disabled) 2 ETI Controls the timer/event counter interrupt (1= enabled; 0= disabled) 3, 6~7 Unused bit, read EIF External interrupt request flag (1= active; 0= inactive Internal timer/event counter request flag (1= active; 0= inactive) ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 If the Crystal oscillator is used, a crystal across OSC1 and OSC2 is needed to provide the feedback and phase shift required for the oscillator, and no other external components are required. Instead of a crystal, a resona- tor can also be connected between OSC1 and OSC2 to ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 The system can leave the HALT mode by means of an external reset, an interrupt, an external falling edge sig- nal on port WDT overflow. An external reset causes a device initialization and the WDT overflow per- forms a warm reset . After the TO and PDF flags are examined, the reason for chip reset can be determined ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 An extra option load time delay is added during system reset (power-up, WDT time-out at normal mode or RES reset). The functional unit chip reset status are shown below. Program Counter 000H Interrupt Disable Prescaler Clear WDT Clear. After master reset, WDT begins counting ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 The TM0, TM1 bits define the operating mode. The event count mode is used to count external events, which means the clock source comes from an external (TMR) pin. The timer mode functions as a normal timer with the clock source coming from the f ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 In the case of timer/event counter OFF condition, writing data to the timer/event counter preload register will also reload that data to the timer/event counter. But if the timer/event counter is turned on, data written to it will only be kept in the timer/event counter preload register. The timer/event counter will still operate until overflow occurs ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 signal in output mode of PB0/PB1 will be the PFD signal generated by timer/event counter overflow signal. The input mode always remaining its original functions. Once the BZ/BZ option is selected, the buzzer output signals are controlled by PB0 data register only. The I/O functions of PB0/PB1 are shown below. ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Options The following table shows all kinds of options in the microcontroller. All of the options must be defined to ensure proper system functioning. Items 1 WDT clock source: WDTOSC WDT function: enable or disable 3 LVR function: enable or disable 4 CLRWDT instruction(s): one or two clear WDT instruction(s) ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Instruction Set Introduction microcontroller is its instruction set, which is a set of pro- gram instruction codes that directs the microcontroller to perform certain operations. In the case of Holtek ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Bit Operations The ability to provide single bit operations on Data Mem- ory is an extremely flexible feature of all Holtek microcontrollers. This feature is especially useful for output port bit programming where individual bits or port pins can be directly set high or low using either the SET [m] ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Mnemonic Rotate RRA [m] Rotate Data Memory right with result in ACC RR [m] Rotate Data Memory right RRCA [m] Rotate Data Memory right through Carry with result in ACC RRC [m] Rotate Data Memory right through Carry RLA [m] Rotate Data Memory left with result in ACC ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Instruction Definition ADC A,[m] Add Data Memory to ACC with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added. The result is stored in the Accumulator. Operation ACC ACC + [ Affected flag(s) OV, Z, AC, C ADCM A,[m] Add ACC to Data Memory with Carry Description The contents of the specified Data Memory, Accumulator and the carry flag are added ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 CALL addr Subroutine call Description Unconditionally calls a subroutine at the specified address. The Program Counter then in- crements obtain the address of the next instruction which is then pushed onto the stack. The specified address is then loaded and the program continues execution from this new address ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 CPL [m] Complement Data Memory Description Each bit of the specified Data Memory is logically complemented (1 s complement). Bits which previously contained a 1 are changed to 0 and vice versa. Operation [m] [m] Affected flag(s) Z CPLA [m] Complement Data Memory with result in ACC Description Each bit of the specified Data Memory is logically complemented (1 s complement) ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 INC [m] Increment Data Memory Description Data in the specified Data Memory is incremented by 1. Operation [m] [ Affected flag(s) Z INCA [m] Increment Data Memory with result in ACC Description Data in the specified Data Memory is incremented by 1. The result is stored in the Accumu- lator. The contents of the Data Memory remain unchanged. ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 OR A,x Logical OR immediate data to ACC Description Data in the Accumulator and the specified immediate data perform a bitwise logical OR op- eration. The result is stored in the Accumulator. Operation ACC ACC OR x Affected flag(s) Z ORM A,[m] Logical OR ACC to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical OR oper- ation ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 RLC [m] Rotate Data Memory left through Carry Description The contents of the specified Data Memory and the carry flag are rotated left by 1 bit. Bit 7 replaces the Carry bit and the original carry flag is rotated into bit 0. Operation [m].(i+1) [m].i ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 SBC A,[m] Subtract Data Memory from ACC with Carry Description The contents of the specified Data Memory and the complement of the carry flag are sub- tracted from the Accumulator. The result is stored in the Accumulator. Note that if the result of subtraction is negative, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 SIZ [m] Skip if increment Data Memory is 0 Description The contents of the specified Data Memory are first incremented the result is 0, the following instruction is skipped. As this requires the insertion of a dummy instruction while the next instruction is fetched two cycle instruction. If the result is not 0 the program proceeds with the following instruction ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 SWAP [m] Swap nibbles of Data Memory Description The low-order and high-order nibbles of the specified Data Memory are interchanged. Operation [m].3~[m].0 Affected flag(s) None SWAPA [m] Swap nibbles of Data Memory with result in ACC Description The low-order and high-order nibbles of the specified Data Memory are interchanged. The result is stored in the Accumulator ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 XOR A,[m] Logical XOR Data Memory to ACC Description Data in the Accumulator and the specified Data Memory perform a bitwise logical XOR op- eration. The result is stored in the Accumulator. Operation ACC ACC XOR [m] Affected flag(s) Z XORM A,[m] Logical XOR ACC to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical XOR op- eration ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Package Information 16-pin SSOP (150mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 228 150 8 189 Max. 244 157 12 197 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 16-pin NSOP (150mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 228 149 14 386 Max. 244 157 20 394 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 18-pin DIP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 895 240 125 125 16 50 100 295 335 0 32 Max. 915 260 135 145 20 70 315 375 15 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 18-pin SOP (300mil) Outline Dimensions Symbol Rev. 1.50 Dimensions in mil Min. Nom. 394 290 14 447 Max. 419 300 20 460 104 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Product Tape and Reel Specifications Reel Dimensions SSOP 16S Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness SOP 16N (150mil) Symbol Description A Reel Outer Diameter B Reel Inner Diameter ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 SOP 18W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.50 Dimensions in mm 330 1.0 62 1.5 13.0+0.5 0.2 2.0 0.5 24.8+0.3 0.2 30.2 0.2 35 August 22, 2007 ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Carrier Tape Dimensions SSOP 16S Symbol Description W Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 SOP 18W Symbol Description W Carrier Tape Width P Cavity Pitch E Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K0 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev ...
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... HT48R05A-1/HT48C05/HT48R06A-1/HT48C06/HT48R08A-1 Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Taipei Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor Inc ...