K4S641632N-LC60 Samsung, K4S641632N-LC60 Datasheet

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K4S641632N-LC60

Manufacturer Part Number
K4S641632N-LC60
Description
Manufacturer
Samsung
Datasheet

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K4S641632N-LC60
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K4S640832N
K4S641632N
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
64Mb N-die SDRAM Specification
* Samsung Electronics reserves the right to change products or specification without notice.
with Pb-Free and Halogen Free
(RoHS compliant)
54 TSOP-II
1 of 15
Rev. 1.1 December 2007
Synchronous DRAM

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K4S641632N-LC60 Summary of contents

Page 1

... K4S640832N K4S641632N 64Mb N-die SDRAM Specification with Pb-Free and Halogen Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...

Page 2

... K4S640832N K4S641632N Table of Contents 1.0 FEATURES .................................................................................................................................... 4 2.0 GENERAL DESCRIPTION ............................................................................................................ 4 3.0 Ordering Information ................................................................................................................... 4 4.0 Package Physical Dimension ...................................................................................................... 5 5.0 FUNCTIONAL BLOCK DIAGRAM................................................................................................. 6 6.0 PIN CONFIGURATION................................................................................................................... 7 7.0 Input/Output Function Description ............................................................................................. 7 8.0 ABSOLUTE MAXIMUM RATINGS ............................................................................................... 8 9.0 DC OPERATING CONDITIONS..................................................................................................... 8 10.0 CAPACITANCE............................................................................................................................ 8 11.0 DC CHARACTERISTICS ............................................................................................................ 9 12.0 AC OPERATING TEST CONDITIONS....................................................................................... 11 13.0 OPERATING AC PARAMETER................................................................................................. 11 14.0 AC CHARACTERISTICS ........................................................................................................... 12 15.0 DQ BUFFER OUTPUT DRIVE CHARACTERISTICS................................................................ 12 16 ...

Page 3

... K4S640832N K4S641632N Revision History Revision Month Year 1.0 December 2007 1.1 December 2007 - Release SPEC revision 1.0 - Revised ICC6 SPEC of lowpower Synchronous DRAM History Rev. 1.1 December 2007 ...

Page 4

... RoHS compliant 2.0 GENERAL DESCRIPTION The K4S640832N / K4S641632N is 67,108,864 bits synchronous high data rate Dynamic RAM organized 2,097,152 words by 8 bits 1,048,576 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high perfor- mance memory system applications ...

Page 5

... K4S640832N K4S641632N 4.0 Package Physical Dimension #54 #1 (1.50) 0.80TYP (0.71) [0.80 0.08] ± NOTE REFERENCE ASS’Y OUT QUALITY #28 #27 22.22 0.10 ± (10°) (10°) +0.10 0.35 - 0.05 54Pin TSOP(II) Package Dimension Synchronous DRAM +0.075 0.125 - 0.035 0.10 MAX [ [ 0.075 MAX Rev. 1.1 December 2007 Unit : mm 0.25TYP (0° ∼ 8°) ...

Page 6

... K4S640832N K4S641632N 5.0 FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE Samsung Electronics reserves the right to change products or specification without notice. * Data Input Register Column Decoder Latency & ...

Page 7

... K4S640832N K4S641632N 6.0 PIN CONFIGURATION x16 V DD DQ0 V DDQ DQ1 DQ2 V SSQ DQ3 DQ4 V DDQ DQ5 DQ6 V SSQ DQ7 V DD LDQM WE CAS RAS CS BA0 BA1 A10/AP A10/ 7.0 Input/Output Function Description Pin Name CLK System clock CS Chip select CKE Clock enable ...

Page 8

... K4S640832N K4S641632N 8.0 ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ASOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...

Page 9

... K4S640832N K4S641632N 11.0 DC CHARACTERISTICS (x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active Precharge standby current in CC2 power-down mode PS CKE & CLK ≤ CC2 I N CC2 Precharge standby current in non power-down mode I NS CC2 I P Active standby current in ...

Page 10

... CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S641632N-LC 4. K4S641632N-LL 5. Unless otherwise noted, input swing IeveI is CMOS 70°C for x16 only) A Test Condition Burst length = 1 ≥ (min CKE ≤ ...

Page 11

... K4S640832N K4S641632N 12.0 AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V 1200Ω Output 30pF 870Ω (Fig output load circuit 13.0 OPERATING AC PARAMETER Parameter ...

Page 12

... K4S640832N K4S641632N 14.0 AC CHARACTERISTICS Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width Input setup time Input hold time ...

Page 13

... K4S640832N K4S641632N 16.0 IBIS SPECIFICATION I Characteristics (Pull-up) OH 200MHz/133MHz 200MHz/133MHz Voltage Min (V) I (mA) 3.45 - 3.30 - 3.00 -0.35 2.70 -3.75 2.50 -6.65 1.95 -13.75 1.80 -17.75 1.65 -20.55 1.50 -23.55 1.40 -26.2 1.00 -36.25 0.20 -46.5 I Characteristics (Pull-down) OL 200MHz/133MHz 200MHz/133MHz Voltage Min (V) I (mA) 3.45 43.92 3.30 - 3.00 43.36 1.95 41.20 1.80 40.56 1.65 39.60 1.50 38.40 1.40 37.28 1.00 30.08 0.85 26.64 0.65 21.52 0.40 14.16 0 0.5 0 Max I (mA) -100 -1.68 -19.11 -200 -51.87 -90.44 -107.31 -300 -137.9 -158.34 -400 -173.6 -188.79 -199.01 -500 -241.15 -351.68 -600 250 Max I (mA) 200 155.82 - 153 ...

Page 14

... K4S640832N K4S641632N V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 Synchronous DRAM Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 -20 -30 -40 -50 -60 Voltage I (mA) Rev ...

Page 15

... K4S640832N K4S641632N 17.0 SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Exit Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address Auto precharge enable ...

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