LM5118MH National Semiconductor, LM5118MH Datasheet
LM5118MH
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LM5118MH Summary of contents
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... The device is available in a power enhanced TSSOP-20 package featuring an exposed die attach pad to aid thermal dissipation. Typical Application Circuit © 2008 National Semiconductor Corporation Features ■ Ultra-wide input voltage range from 3V to 75V ■ ...
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... Connection Diagram Ordering Information Ordering Number Package Type LM5118MH TSSOP-20EP LM5118MHX TSSOP-20EP Pin Descriptions Pin Name Description 1 VIN Input supply voltage. 2 UVLO If the UVLO pin is below 1.23V, the regulator will be in standby mode (VCC regulator running, switching regulator disabled). When the UVLO pin exceeds 1.23V, the regulator enters the normal operating mode. An external voltage divider can be used to set an under-voltage shutdown threshold. A fixed 5 µ ...
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Pin Name Description 16 VCC Output of the bias regulator. Locally decouple to PGND using a low ESR/ESL capacitor located as close to the controller as possible. 17 VCCX Optional input for an externally supplied bias supply. If the voltage ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN, EN, VOUT to GND VCC, LO, VCCX, UVLO to GND (Note GND CSG GND Electrical Characteristics junction temperature range of -40°C to +125°C. Unless otherwise specified, the following conditions apply: VIN = 48V, VCCX = 0V 5V 29.11 kΩ ...
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Symbol Parameter COMP Sink/Source Current A DC Gain OL f Unity Bain Bandwidth BW PWM COMPARATORS t Forced HO Off-time HO(OFF) T Minimum HO On-time ON(MIN) COMP to Comparator Offset OSCILLATOR (RT PIN) f Frequency 1 SW1 f Frequency 2 ...
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Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test ...
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Typical Performance Characteristics Efficiency vs VIN and IOUT VOUT = 12V VCC vs VIN Error Amplifier Gain/Phase Current Limit Threshold vs VOUT/VIN 30058503 30058505 LO and HO Peak Gate Current vs Output Voltage 30058507 7 VOUT = 12V 30058504 VCC ...
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Oscillator Frequency vs RT www.national.com 30058509 8 ...
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Block Diagram and Typical Application Circuit 9 www.national.com ...
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Detailed Operating Description The LM5118 high voltage switching regulator features all of the functions necessary to implement an efficient high voltage buck or buck-boost regulator using a minimum of external components. The regulator switches smoothly from buck to buck-boost operation ...
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FIGURE 4. Mode Dependence on Duty Cycle (VOUT =12V) Operation Modes Figure 4 illustrates how duty cycle affects the operational mode and is useful for reference in the following discussions. Initially, only the buck switch is active and the buck ...
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FIGURE 5. Buck (HO) and Boost (LO) Switch Duty Cycle vs. Time, Illustrating Gradual Mode Change with Decreasing Input Voltage High Voltage Start-Up Regulator The LM5118 contains a dual mode, high voltage linear regu- lator that provides the VCC bias ...
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The EN pin can be tied directly to the VIN pin if this function is not needed. It must not be left floating MΩ pull-up resistor to VIN can be used ...
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Error Amplifier and PWM Comparator The internal high gain error amplifier generates an error signal proportional to the difference between the regulated output voltage and an internal precision reference (1.23V). The out- put of the error amplifier is connected to ...
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Where g is the ramp generator transconductance (5 µA/V) m and A is the current sense amplifier gain (10V/V). The ramp capacitor should be located very close to the device and con- nected directly to the RAMP and AGND pins. ...
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Maximum Duty Cycle Each conduction cycle of the buck switch is followed by a forced minimum off-time of 400ns to allow sufficient time for the re-circulating diode current to be sampled. This forced off- time limits the maximum duty cycle ...
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FIGURE 12. Inductor Current Waveform INDUCTOR SELECTION L1 The inductor value is determined based upon the operating frequency, load current, ripple current and the input and out- put voltages. Refer to Figure 12 for details. To keep the circuit in ...
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Buck-boost mode capacitance can be estimated from: ESR requirements can be estimated from: For our example, with a ΔVOUT (output ripple mV 141 µF MIN ESR = 3.8 mΩ ...
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ICout For this application, a C16 value of 0.1 µF was chosen which corresponds to a soft-start time of about 12 ms. R8 and R9 set the output voltage level, the ratio ...
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RHP zero. The error amplifier zero (see below) should be placed near the dominate modulator pole. This is a good starting point for compensation. Refer to the on-line LM5118 Quick-Start calculator for ready to use ...
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The plots shown in Figures 13, 14 and 15 illustrate the gain and phase diagrams of the design example. The overall band- width is lower in a buck-boost application due the compen- sation challenges associated with the right-half-plane zero. For ...
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PCB Layout and Thermal Considerations In a buck-boost regulator, there are two loops where currents are switched very fast. The first loop starts from the input ca- pacitors, and then to the buck switch, the inductor, the boost switch then ...
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Physical Dimensions www.national.com inches (millimeters) unless otherwise noted TSSOP-20EP Outline Drawing NS Package Number MXA20A 24 ...
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Notes 25 www.national.com ...
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