LPC2106FBD48 NXP Semiconductors, LPC2106FBD48 Datasheet

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LPC2106FBD48

Manufacturer Part Number
LPC2106FBD48
Description
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
2.1 Key features
The LPC2104/2105/2106 are based on a 16/32-bit ARM7TDMI-S CPU with real-time
emulation and embedded trace support, together with 128 kB of embedded high speed
flash memory. A 128-bit wide memory interface and a unique accelerator architecture
enable 32-bit code execution at maximum clock rate. For critical code size applications,
the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
Due to their tiny size and low power consumption, these microcontrollers are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. With a wide range of serial communications interfaces and on-chip SRAM
options up to 64 kB, they are very well suited for communication gateways and protocol
converters, soft modems, voice recognition and low end imaging, providing both large
buffer size and high processing power. Various 32-bit timers, PWM channels and 32 GPIO
lines make these microcontrollers particularly suitable for industrial control and medical
systems.
Remark: Throughout the data sheet, the term LPC2104/2105/2106 will apply to devices
with and without the /00 suffix. New devices will use the /00 suffix to differentiate from the
original devices only when necessary.
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I
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LPC2104/2105/2106
Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with
16/32/64 kB RAM
Rev. 06 — 25 July 2006
16/32-bit ARM7TDMI-S processor.
16/32/64 kB on-chip static RAM.
128 kB on-chip flash program memory. 128-bit-wide interface/accelerator enables high
speed 60 MHz operation.
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
bootloader software. Flash programming takes 1 ms per 512 B line. Single sector or
full chip erase takes 400 ms.
Vectored Interrupt Controller with configurable priorities and vector addresses.
EmbeddedICE-RT interface enables breakpoints and watch points. Interrupt service
routines can continue to execute whilst the foreground task is debugged with the
on-chip RealMonitor software.
Embedded Trace Macrocell enables non-intrusive high speed real-time tracing of
instruction execution.
Multiple serial interfaces including two UARTs (16C550), Fast I
SPI.
2
C-bus (400 kbit/s) and
Product data sheet

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LPC2106FBD48 Summary of contents

Page 1

LPC2104/2105/2106 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM Rev. 06 — 25 July 2006 1. General description The LPC2104/2105/2106 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128 ...

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... LPC2105FBD48/00 LPC2106FBD48 LPC2106FBD48/00 LPC2106FHN48 LPC2106FHN48/00 3.1 Ordering options Table 2. Type number LPC2104BBD48 LPC2104FBD48/00 LPC2105BBD48 LPC2105FBD48/00 LPC2106FBD48 LPC2104_2105_2106_6 Product data sheet Ordering information Package Name Description LQFP48 plastic low profile quad flat package; 48 leads; body 7 7 LQFP48 plastic low profile quad flat package; 48 leads; ...

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... Philips Semiconductors Table 2. Type number LPC2106FBD48/00 LPC2106FHN48 LPC2106FHN48/00 LPC2104_2105_2106_6 Product data sheet Ordering options …continued Flash memory 128 kB 128 kB 128 kB Rev. 06 — 25 July 2006 LPC2104/2105/2106 Single-chip 32-bit microcontrollers RAM Temperature range + + +85 C © ...

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Philips Semiconductors 4. Block diagram LPC2104/2105/2106 ARM7 LOCAL BUS INTERNAL SRAM CONTROLLER 16/32/64 kB SRAM EXTERNAL (1) EINT[2:0] INTERRUPTS (1) CAP0[2:0] CAPTURE/ (1) CAP1[3:0] COMPARE (1) MAT0[2:0] TIMER 0/TIMER 1 (1) MAT1[3:0] GENERAL P0[31:0] PURPOSE I/O (1) PWM0 PWM[6:1] REAL ...

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Philips Semiconductors 5. Pinning information 5.1 Pinning P0.19/MAT1.2/TCK P0.20/MAT1.3/TDI P0.21/PWM5/TDO V P0.27/TRACEPKT0/TRST P0.28/TRACEPKT1/TMS P0.29/TRACEPKT2/TCK Fig 2. Pinning (LQFP48) LPC2104_2105_2106_6 Product data sheet n. DD(1V8) RESET 6 LPC2104/2105/2106 XTAL1 11 ...

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Philips Semiconductors terminal 1 index area P0.19/MAT1.2/TCK P0.20/MAT1.3/TDI P0.21/PWM5/TDO P0.27/TRACEPKT0/TRST P0.28/TRACEPKT1/TMS P0.29/TRACEPKT2/TCK Fig 3. Pinning (HVQFN48) LPC2104_2105_2106_6 Product data sheet n. DD(1V8) RESET 6 LPC2104/2105/2106 XTAL1 11 12 ...

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Philips Semiconductors 5.2 Pin description Table 3. Pin description Symbol Pin P0.0 to P0.31 P0.0/TXD0/PWM1 13 P0.1/RXD0/PWM3 14 P0.2/SCL/CAP0.0 18 P0.3/SDA/MAT0.0 21 P0.4/SCK/CAP0.1 22 P0.5/MISO/MAT0.1 23 P0.6/MOSI/CAP0.2 24 P0.7/SSEL/PWM2 28 P0.8/TXD1/PWM4 29 P0.9/RXD1/PWM6 30 P0.10/RTS1/CAP1.0 35 LPC2104_2105_2106_6 Product data sheet ...

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Philips Semiconductors Table 3. Pin description …continued Symbol Pin P0.11/CTS1/CAP1.1 36 P0.12/DSR1/MAT1.0 37 P0.13/DTR1/MAT1.1 41 P0.14/DCD1/EINT1 44 P0.15/RI1/EINT2 45 P0.16/EINT0/MAT0.2 46 P0.17/CAP1.2/TRST 47 P0.18/CAP1.3/TMS 48 P0.19/MAT1.2/TCK 1 P0.20/MAT1.3/TDI 2 P0.21/PWM5/TDO 3 P0.22/TRACECLK 32 P0.23/PIPESTAT0 33 P0.24/PIPESTAT1 34 P0.25/PIPESTAT2 38 LPC2104_2105_2106_6 ...

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Philips Semiconductors Table 3. Pin description …continued Symbol Pin P0.26/TRACESYNC 39 P0.27/TRACEPKT0/ 8 TRST P0.28/TRACEPKT1/ 9 TMS P0.29/TRACEPKT2/ 10 TCK P0.30/TRACEPKT3/ 15 TDI P0.31/EXTIN0/TDO 16 RTCK 26 DBGSEL 27 RESET 6 XTAL1 11 XTAL2 19, SS 31, ...

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Philips Semiconductors 6. Functional description 6.1 Architectural overview The ARM7TDMI general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction ...

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Philips Semiconductors 6.4 Memory map The LPC2104/2105/2106 memory maps incorporate several distinct regions, as shown in the following figures. In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either flash memory (the default) or ...

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Philips Semiconductors Fig 5. LPC2105 memory map LPC2104_2105_2106_6 Product data sheet 4.0 GB AHB PERIPHERALS 3.75 GB VPB PERIPHERALS 3.5 GB 3.0 GB RESERVED ADDRESS SPACE 2.0 GB BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY RESERVED ADDRESS SPACE 32 KBYTE ...

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Philips Semiconductors Fig 6. LPC2106 memory map 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes, them as FIQ, vectored IRQ, and non-vectored IRQ as defined by programmable settings. The programmable assignment ...

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Philips Semiconductors Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned to this category. Any of the interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which slot 0 has ...

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Philips Semiconductors 6.6 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals. Peripherals should ...

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Philips Semiconductors Table 6. PINSEL0 15:14 17:16 19:18 21:20 23:22 25:24 27:26 29:28 31:30 6.8 Pin function select register 1 (PINSEL1 - 0xE002 C004) The PINSEL1 register controls the functions of the pins as per the settings listed in Table ...

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Philips Semiconductors Table 7. PINSEL1 3:2 5:4 7:6 9:8 11:10 13:12 15:14 17:16 19:18 21:20 23:22 25:24 27:26 29:28 31:30 6.9 General purpose parallel I/O Device pins that are not connected to a specific peripheral function are controlled by the ...

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Philips Semiconductors 6.10.1 Features • 16 byte Receive and Transmit FIFOs • Register locations conform to 16C550 industry standard • Receiver FIFO trigger points and 14 B • Built-in baud rate generator • ...

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Philips Semiconductors 6.12.1 Features • Compliant with Serial Peripheral Interface (SPI) specification. • Synchronous, Serial, Full Duplex, Communication. • Combined SPI master and slave. • Maximum data bit rate of one eighth of the input clock rate. 6.13 General purpose ...

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Philips Semiconductors • Incorrect/Incomplete feed sequence causes reset/interrupt if enabled. • Flag to indicate watchdog reset. • Programmable 32-bit timer with internal pre-scaler. • Selectable time period from (T T cy(PCLK) 6.15 Real time clock The Real Time Clock (RTC) ...

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Philips Semiconductors With double edge controlled PWM outputs, specific match registers control the rising and falling edge of the output. This allows both positive going PWM pulses (when the rising edge occurs prior to the falling edge), and negative going ...

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Philips Semiconductors produce the output clock. Since the minimum output divider value insured that the PLL output has duty cycle.The PLL is turned off and bypassed ...

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Philips Semiconductors In Power-down mode, the oscillator is shut down and the chip receives no internal clocks. The processor state and registers, peripheral registers, and internal SRAM values are preserved throughout Power-down mode and the logic levels of chip output ...

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Philips Semiconductors 6.18.2 Embedded trace Since the LPC2104/2105/2106 have significant amounts of on-chip memory not possible to determine how the processor core is operating simply by observing the external pins. The Embedded Trace Macrocell (ETM) provides real-time trace ...

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Philips Semiconductors 7. Limiting values Table 8. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) V input voltage I I supply current ...

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Philips Semiconductors 8. Static characteristics Table 9. Static characteristics +70 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) Standard port pins, ...

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Philips Semiconductors Table 9. Static characteristics +70 C for commercial applications, unless otherwise specified. amb Symbol Parameter 2 I C-bus pins V HIGH-state input voltage IH V LOW-state input voltage IL V hysteresis voltage hys ...

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Philips Semiconductors 9. Dynamic characteristics Table 10. Dynamic characteristics +70 C for commercial applications +85 C for industrial applications; V amb [1] specified ranges. Symbol Parameter External clock f oscillator frequency osc ...

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Philips Semiconductors 9.1 Timing V 0 0.2V 0.2V 0.45 V Fig 7. External clock timing LPC2104_2105_2106_6 Product data sheet 0 0 CHCL CLCX Rev. 06 — 25 July 2006 LPC2104/2105/2106 Single-chip 32-bit ...

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Philips Semiconductors 10. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...

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Philips Semiconductors HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm ...

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Philips Semiconductors 11. Abbreviations Table 11. Acronym AMBA CPU DCC FIFO GPIO PLL PWM RAM SPI SRAM TTL UART VPB LPC2104_2105_2106_6 Product data sheet Abbreviations Description Advanced Microcontroller Bus Architecture Central Processing Unit Debug Communications Channel First In, First Out ...

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... LPC2104_2105_2106_6 20060725 • The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors • Section 3 “Ordering LPC2105FBD48/00, LPC2106FBD48/00, and LPC2106FHN48/00. LPC2104_2105_2106-05 20041222 LPC2104_2105_2106-04 20040205 LPC2104_2105_2106-03 20031007 LPC2104_2105_2106-02 20030611 LPC2104_2105_2106-01 20030425 LPC2104_2105_2106_6 Product data sheet ...

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Philips Semiconductors 13. Legal information 13.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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Philips Semiconductors 15. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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