MC14013BDT ON Semiconductor, MC14013BDT Datasheet

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MC14013BDT

Manufacturer Part Number
MC14013BDT
Description
Manufacturer
ON Semiconductor
Datasheet

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P–channel and N–channel enhancement mode devices in a single
monolithic structure. Each flip–flop has independent Data, (D), Direct
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary
outputs (Q and Q). These devices may be used as shift register
elements or as type T flip–flops for counter and toggle applications.
2. Maximum Ratings are those values beyond which damage to the device
3. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
either V
MAXIMUM RATINGS
August, 2000 – Rev. 4
Symbol
V
I
The MC14013B dual type D flip–flop is constructed with MOS
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going
edge of the clock pulse
Schottky TTL Load Over the Rated Temperature Range
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge–Clocked Flip–Flop Design
Capable of Driving Two Low–power TTL Loads or One Low–power
Pin–for–Pin Replacement for CD4013B
in
in
Semiconductor Components Industries, LLC, 2000
may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
V
T
P
, I
T
T
, V
DD
stg
A
D
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 3.)
(8–Second Soldering)
v (V
). Unused outputs must be left open.
in
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
–0.5 to V
–0.5 to +18.0
SS
–55 to +125
–65 to +150
out
) (Note 2.)
Value
500
260
should be constrained
10
DD
+ 0.5
1
Unit
mW
mA
V
V
C
C
C
1. For ordering information on the EIAJ version of
MC14013BCP
MC14013BD
MC14013BDR2
MC14013BDT
MC14013BDTR2
MC14013BF
MC14013BFEL
the SOIC packages, please contact your local
ON Semiconductor representative.
Device
A
WL, L
YY, Y
WW, W
ORDERING INFORMATION
http://onsemi.com
CASE 948G
CASE 751A
SOEIAJ–14
TSSOP–14
DT SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
CASE 646
CASE 965
P SUFFIX
D SUFFIX
F SUFFIX
PDIP–14
SOIC–14
SOEIAJ–14
SOEIAJ–14
TSSOP–14
TSSOP–14 2500/Tape & Reel
SOIC–14
SOIC–14
Package
PDIP–14
Publication Order Number:
14
14
2500/Tape & Reel
14
1
1
1
DIAGRAMS
MC14013BCP
MARKING
See Note 1.
See Note 1.
AWLYYWW
14
MC14013B
AWLYWW
1
Shipping
2000/Box
MC14013B/D
14013B
55/Rail
96/Rail
ALYW
ALYW
013B
14

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MC14013BDT Summary of contents

Page 1

... C –65 to +150 C 260 C MC14013BCP MC14013BD MC14013BDR2 and V should be constrained in out MC14013BDT MC14013BDTR2 MC14013BF MC14013BFEL 1. For ordering information on the EIAJ version of 1 http://onsemi.com MARKING DIAGRAMS 14 PDIP–14 MC14013BCP P SUFFIX AWLYYWW CASE 646 1 14 SOIC–14 14013B D SUFFIX ...

Page 2

MC14013B TRUTH TABLE Inputs † Clock Data Reset Set Don’t Care † = Level Change PIN ASSIGNMENT ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î Î ...

Page 5

Inputs R and S low. Figure 1. Dynamic Signal Waveforms (Data, Clock, and Output) BINARY RIPPLE UP–COUNTER (Divide–by–2 MODIFIED RING COUNTER (Divide–by–(n+1)) MC14013B Figure 2. Dynamic Signal Waveforms (Set, Reset, Clock, and Output) TYPICAL APPLICATIONS n–STAGE SHIFT REGISTER n http://onsemi.com ...

Page 6

–T– –A– –B– G –T– MC14013B PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE 646–06 ISSUE SUFFIX PLASTIC SOIC PACKAGE ...

Page 7

K 14X REF L PIN 1 IDENT. A –V– C –T– VIEW MC14013B PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G–01 ISSUE O N ...

Page 8

... CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit– ...

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