MC14052BD

Manufacturer Part NumberMC14052BD
ManufacturerON Semiconductor
MC14052BD datasheet
 


1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
Page 1/12

Download datasheet (170Kb)Embed
Next
MC14051B, MC14052B,
MC14053B
Analog
Multiplexers/Demultiplexers
The MC14051B, MC14052B, and MC14053B analog multiplexers
are digitally−controlled analog switches. The MC14051B effectively
implements an SP8T solid state switch, the MC14052B a DP4T, and
the MC14053B a Triple SPDT. All three devices feature low ON
impedance and very low OFF leakage current. Control of analog
signals up to the complete supply voltage range can be achieved.
Features
Triple Diode Protection on Control Inputs
Switch Function is Break Before Make
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Analog Voltage Range (V
− V
DD
EE
must be v V
Note: V
EE
SS
Linearized Transfer Characteristics
Low−noise − 12 nV/√Cycle, f ≥ 1.0 kHz Typical
Pin−for−Pin Replacement for CD4051, CD4052, and CD4053
For 4PDT Switch, See MC14551B
For Lower R
, Use the HC4051, HC4052, or HC4053 High−Speed
ON
CMOS Devices
Pb−Free Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
Symbol
Parameter
V
DC Supply Voltage Range
DD
≥ V
(Referenced to V
, V
EE
SS
EE
V
,
Input or Output Voltage Range
in
V
(DC or Transient) (Referenced to V
out
Control Inputs and V
for Switch I/O)
EE
I
Input Current (DC or Transient)
in
per Control Pin
I
Switch Through Current
SW
P
Power Dissipation per Package (Note 1)
D
T
Ambient Temperature Range
A
T
Storage Temperature Range
stg
T
Lead Temperature (8−Second Soldering)
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From
65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
v (V
) v V
the range V
or V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either
V
, V
or V
). Unused outputs must be left open.
SS
EE
DD
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 10
) = 3.0 to 18 V
)
SS
Value
Unit
−0.5 to +18.0
V
)
−0.5 to V
+ 0.5
V
DD
for
SS
+10
mA
± 25
mA
500
mW
°C
−55 to +125
°C
−65 to +150
°C
260
and V
should be constrained to
in
out
1
http://onsemi.com
MARKING
DIAGRAMS
16
MC1405xBCP
PDIP−16
AWLYYWWG
1
P SUFFIX
1
CASE 648
16
1405xBG
AWLYWW
SOIC−16
D SUFFIX
1
1
CASE 751B
16
14
05xB
TSSOP−16
ALYWG
1
G
DT SUFFIX
CASE 948F
1
16
MC1405xB
ALYWG
SOEIAJ−16
F SUFFIX
1
1
CASE 966
x
= 1, 2, or 3
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W
= Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Publication Order Number:
MC14051B/D

MC14052BD Summary of contents