MC9S12DG128B Freescale Semiconductor, Inc, MC9S12DG128B Datasheet

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MC9S12DG128B

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MC9S12DG128B
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor, Inc.
DOCUMENT NUMBER
9S12DT128BDGV1/D
MC9S12DT128B
Device User Guide
V01.09
Covers also
MC9S12DG128B, MC9S12DJ128B,
MC9S12DB128B
Original Release Date: 18 June 2001
Revised: 31 October 2002
For More Information On This Product,
Go to: www.freescale.com

Related parts for MC9S12DG128B

MC9S12DG128B Summary of contents

Page 1

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide Covers also MC9S12DG128B, MC9S12DJ128B, MC9S12DB128B Original Release Date: 18 June 2001 Revised: 31 October 2002 For More Information On This Product, Go to: www.freescale.com V01.09 DOCUMENT NUMBER 9S12DT128BDGV1/D ...

Page 2

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Revision History Version Revision Effective Number Date Date 18 Jun 18 June V01.00 2001 2001 23 July 23 July V01.01 2001 2001 23 Sep 23 Sep V01.02 2001 2001 12 Oct 12 Oct V01.03 2001 2001 27 Feb 27 Feb V01.04 2002 ...

Page 3

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 4

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 5

... Freescale Semiconductor, Inc. Table of Contents Section 1 Introduction 1.1 Overview .17 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 1.3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 1.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 1.5 Device Memory Map .22 1.5.1 Detailed Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 1.6 Part ID Assignments .47 Section 2 Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 2.1 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 2.2 Signal Properties Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 2.3 Detailed Signal Descriptions .55 2.3.1 EXTAL, XTAL — Oscillator Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 2.3.2 RESET — External Reset Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 2.3.3 TEST — ...

Page 6

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.21 PH6 / KWH6 — Port H I/O Pin .59 2.3.22 PH5 / KWH5 — Port H I/O Pin .59 2.3.23 PH4 / KWH4 — Port H I/O Pin .59 2.3.24 PH3 / KWH3 / SS1 — Port H I/O Pin .59 2.3.25 PH2 / KWH2 / SCK1 — Port H I/O Pin .59 2.3.26 PH1 / KWH1 / MOSI1 — ...

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... Freescale Semiconductor, Inc. 2.3.57 PT[7:0] / IOC[7:0] — Port T I/O Pins [7: .63 2.4 Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers . . . . . . . . . . . . . . . . . . . . . . . .64 2.4.2 VDDR, VSSR — Power & Ground Pins for I/O Drivers & for Internal Voltage Regulator 64 2.4.3 VDD1, VDD2, VSS1, VSS2 — Core Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 2.4.4 VDDA, VSSA — Power Supply Pins for ATD and VREG . . . . . . . . . . . . . . . . . . . . .65 2.4.5 VRH, VRL — ...

Page 8

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 7 Clock and Reset Generator (CRG) Block Description . . . . . . . . . 77 7.1 Device-specific information .77 7.1.1 XCLKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 Section 8 Enhanced Capture Timer (ECT) Block Description . . . . . . . . . . . . 77 Section 9 Analog to Digital Converter (ATD) Block Description Section 10 Inter-IC Bus (IIC) Block Description . . . . . . . . . . . . . . . . . . . . . . . 77 Section 11 Serial Communications Interface (SCI) Block Description Section 12 Serial Peripheral Interface (SPI) Block Description ...

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... Freescale Semiconductor, Inc. A.1.3 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 A.1.4 Current Injection .86 A.1.5 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 A.1.6 ESD Protection and Latch-up Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 A.1.7 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88 A.1.8 Power Dissipation and Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 A.1.9 I/O Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 A.1.10 Supply Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 A.2 ATD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 A.2.1 ATD Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 A.2.2 Factors influencing accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 A.2.3 ATD accuracy .97 A.3 NVM, Flash and EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 A.3.1 NVM timing .99 A.3.2 NVM Reliability .101 A ...

Page 10

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 11

... MC9S12DT128B Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Figure 1-2 MC9S12DT128B Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128B, MC9S12DJ128B, MC9S12DB128B50 Figure 2-2 Pin Assignments in 80 QFP for MC9S12DG128B, MC9S12DJ128B Bondout . .51 Figure 2-3 PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Figure 2-4 Colpitts Oscillator Connections (PE7= .57 Figure 2-5 Pierce Oscillator Connections (PE7= .57 Figure 2-6 External Clock Connections (PE7=0) ...

Page 12

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 13

... Freescale Semiconductor, Inc. List of Tables Table 0-1 Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 0-2 Document References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 1-1 Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 $0000 - $000F MEBI map (Core User Guide) ........................................................24 $0010 - $0014 MMC map (Core User Guide) ........................................................24 $0015 - $0016 INT map (Core User Guide) ...........................................................25 $0017 - $0017 MMC map (Core User Guide) ...

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... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $01C0 - $01FF Reserved ..................................................................................................41 $0200 - $023F Reserved ..................................................................................................41 $0240 - $027F PIM (Port Integration Module) ..................................................................42 $0280 - $02BF CAN4 (Motorola Scalable CAN - MSCAN) ..............................................44 $02C0 - $02FF Reserved ..................................................................................................45 $0300 - $035F Byteflight ..................................................................................................45 $0360 - $03FF Reserved ..................................................................................................47 Table 1-3 Assigned Part ID Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Table 1-4 Memory size registers ...

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... Freescale Semiconductor, Inc. Derivative Differences and Document References Derivative Differences Table 0-1 shows the availability of peripheral modules on the various derivatives. For details about the compatibility within the MC9S12D-Family refer also to engineering bulletin EB386. Modules MC9S12DT128B MC9S12DG128B # of CANs 3 CAN4 CAN1 CAN0 J1850/BDLC IIC Bytefl ...

Page 16

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 – Do not write or read BDLC registers (after reset: address range $00E8 - $00EF), if using a derivative without BDLC (see Table 0-1). – Do not write or read IIC registers (after reset: address range $00E0 - $00E7), if using a derivative without IIC (see Table 0-1). ...

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... Freescale Semiconductor, Inc. – Port M[7:6] PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs. – Port P6 PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input. – Port S[7:4] PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating inputs. – ...

Page 18

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 19

... Freescale Semiconductor, Inc. Section 1 Introduction 1.1 Overview The MC9S12DT128B microcontroller unit (MCU 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), two serial peripheral interfaces (SPI), an 8-channel IC/OC enhanced capture timer, two 8-channel, 10-bit ...

Page 20

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 – Digital filtering – Programmable rising or falling edge trigger • Memory – 128K Flash EEPROM – 2K byte EEPROM – 8K byte RAM • Two 8-channel Analog-to-Digital Converters – 10-bit resolution – External conversion trigger capability • ...

Page 21

... Freescale Semiconductor, Inc. • SAE J1850 Class B Data Communications Network Interface – Compatible and ISO Compatible for Low-Speed (<125 Kbps) Serial Data Communications in Automotive Applications • Inter-IC Bus (IIC) – Compatible with I2C Bus standard – Multi-master operation – Software programmable for one of 256 different serial clock frequencies • ...

Page 22

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DT128B device. For More Information On This Product, Go to: www.freescale.com ...

Page 23

... Freescale Semiconductor, Inc. Figure 1-1 MC9S12DT128B Block Diagram 128K Byte Flash EEPROM 8K Byte RAM 2K Byte EEPROM VDDR VSSR Voltage Regulator VREGEN VDD1,2 VSS1,2 Single-wire Background BKGD CPU12 Debug Module XFC Clock and VDDPLL Reset PLL VSSPLL Periodic Interrupt Generation EXTAL COP Watchdog ...

Page 24

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.5 Device Memory Map Table 1-1 and Figure 1-2 show the device memory map of the MC9S12DT128B after reset. Note that after reset the EEPROM ($0000 ($0000 - $1FFF). The bottom 1K Bytes of RAM ($0000 - $03FF) are hidden by the register space. ...

Page 25

... Freescale Semiconductor, Inc. Table 1-1 Device Memory Map Address Fixed Flash EEPROM array incl. 0.5K, 1K Protected Sector at end $C000 – $FFFF and 256 bytes of Vector Space at $FF80 Figure 1-2 MC9S12DT128B Memory Map $0000 $0400 $0800 $1000 $2000 $4000 $8000 EXT $C000 $FF00 ...

Page 26

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 1.5.1 Detailed Register Map $0000 - $000F Address Name Read: $0000 PORTA Write: Read: $0001 PORTB Write: Read: $0002 DDRA Write: Read: $0003 DDRB Write: Read: $0004 Reserved Write: Read: $0005 Reserved Write: Read: ...

Page 27

... Freescale Semiconductor, Inc. $0015 - $0016 INT map (Core User Guide) Address Name Bit 7 Read: 0 $0015 ITCR Write: Read: $0016 ITEST INTE Write: $0017 - $0017 MMC map (Core User Guide) Address Name Bit 7 MTST1 Read: Bit 7 $0017 Test Only Write: ...

Page 28

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0020 - $0027 Address Name Read: $0020 - Reserved $0027 Write: $0028 - $002F Address Name Read: $0028 BKPCT0 Write: Read: $0029 BKPCT1 Write: Read: $002A BKP0X Write: Read: $002B BKP0H Write: Read: $002C BKP0L ...

Page 29

... Freescale Semiconductor, Inc. $0034 - $003F CRG (Clock and Reset Generator) Address Name Bit 7 Read: 0 $0034 SYNR Write: Read: 0 $0035 REFDV Write: CTFLG Read: 0 $0036 TEST ONLY Write: Read: $0037 CRGFLG RTIF Write: Read: $0038 CRGINT RTIE Write: Read: $0039 CLKSEL PLLSEL ...

Page 30

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0040 - $007F Address Name Read: $004A TCTL3 Write: Read: $004B TCTL4 Write: Read: $004C TIE Write: Read: $004D TSCR2 Write: Read: $004E TFLG1 Write: Read: $004F TFLG2 Write: Read: $0050 TC0 (hi) ...

Page 31

... Freescale Semiconductor, Inc. $0040 - $007F ECT (Enhanced Capture Timer 16 Bit 8 Channels) Address Name Bit 7 Read: $0063 PACN2 (lo) Bit 7 Write: Read: $0064 PACN1 (hi) Bit 7 Write: Read: $0065 PACN0 (lo) Bit 7 Write: Read: $0066 MCCTL MCZI Write: Read: $0067 MCFLG MCZF Write: Read: 0 $0068 ...

Page 32

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0040 - $007F Address Name Read: $007C TC2H (hi) Write: Read: $007D TC2H (lo) Write: Read: $007E TC3H (hi) Write: Read: $007F TC3H (lo) Write: $0080 - $009F Address Name Read: $0080 ATD0CTL0 Write: Read: $0081 ATD0CTL1 Write: ...

Page 33

... Freescale Semiconductor, Inc. $0080 - $009F ATD0 (Analog to Digital Converter 10 Bit 8 Channel) Address Name Bit 7 Read: Bit15 $0092 ATD0DR1H Write: Read: Bit7 $0093 ATD0DR1L Write: Read: Bit15 $0094 ATD0DR2H Write: Read: Bit7 $0095 ATD0DR2L Write: Read: Bit15 $0096 ATD0DR3H Write: Read: Bit7 ...

Page 34

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00A0 - $00C7 Address Name Read: $00A9 PWMSCLB Write: Read: PWMSCNTA $00AA Test Only Write: Read: PWMSCNTB $00AB Test Only Write: Read: $00AC PWMCNT0 Write: Read: $00AD PWMCNT1 Write: Read: $00AE PWMCNT2 Write: ...

Page 35

... Freescale Semiconductor, Inc. $00A0 - $00C7 PWM (Pulse Width Modulator 8 Bit 8 Channel) Address Name Bit 7 Read: $00C2 PWMDTY6 Bit 7 Write: Read: $00C3 PWMDTY7 Bit 7 Write: Read: $00C4 PWMSDN PWMIF Write: Read: 0 $00C5 Reserved Write: Read: 0 $00C6 Reserved Write: Read: 0 $00C7 Reserved Write: ...

Page 36

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $00D0 - $00D7 Address Name Read: $00D5 SCI1SR2 Write: Read: $00D6 SCI1DRH Write: Read: $00D7 SCI1DRL Write: $00D8 - $00DF Address Name Read: $00D8 SPI0CR1 Write: Read: $00D9 SPI0CR2 Write: Read: $00DA SPI0BR Write: ...

Page 37

... Freescale Semiconductor, Inc. $00E8 - $00EF BDLC (Byte Level Data Link Controller J1850) Address Name Bit 7 Read: $00E8 DLCBCR1 IMSG Write: Read: 0 $00E9 DLCBSVR Write: Read: $00EA DLCBCR2 SMRST Write: Read: $00EB DLCBDR D7 Write: Read: 0 $00EC DLCBARD Write: Read: 0 $00ED DLCBRSR Write: ...

Page 38

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0100 - $010F Address Name Read: FDIVLD $0100 FCLKDIV Write: Read: KEYEN $0101 FSEC Write: Read: $0102 FTSTMOD Write: Read: $0103 FCNFG Write: Read: $0104 FPROT Write: Read: $0105 FSTAT Write: Read: $0106 ...

Page 39

... Freescale Semiconductor, Inc. $0110 - $011B EEPROM Control Register (eets2k) Address Name Bit 7 Read: $0119 EADDRLO Bit 7 Write: Read: $011A EDATAHI Bit 15 Write: Read: $011B EDATALO Bit 7 Write: $011C - $011F Reserved for RAM Control Register Address Name Bit 7 $011C - Read: 0 Reserved $011F ...

Page 40

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0120 - $013F Address Name Read: $0130 ATD1DR0H Write: Read: $0131 ATD1DR0L Write: Read: $0132 ATD1DR1H Write: Read: $0133 ATD1DR1L Write: Read: $0134 ATD1DR2H Write: Read: $0135 ATD1DR2L Write: Read: $0136 ATD1DR3H Write: ...

Page 41

... Freescale Semiconductor, Inc. $0140 - $017F CAN0 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: 0 $0146 CAN0TFLG Write: Read: 0 $0147 CAN0TIER Write: Read: 0 $0148 CAN0TARQ Write: Read: 0 $0149 CAN0TAAK Write: Read: 0 $014A CAN0TBSEL Write: Read: 0 $014B CAN0IDAC Write: Read: 0 $014C Reserved Write: ...

Page 42

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Address Name Read: $xxxC CANRxDLR Write: Read: $xxxD Reserved Write: Read: $xxxE CANxRTSRH Write: Read: $xxxF CANxRTSRL Write: Extended ID Read: CANxTIDR0 Write: $xx10 ...

Page 43

... Freescale Semiconductor, Inc. $0180 - $01BF CAN1 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: $0185 CAN1RIER WUPIE Write: Read: 0 $0186 CAN1TFLG Write: Read: 0 $0187 CAN1TIER Write: Read: 0 $0188 CAN1TARQ Write: Read: 0 $0189 CAN1TAAK Write: Read: 0 $018A CAN1TBSEL Write: Read: 0 $018B CAN1IDAC ...

Page 44

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0240 - $027F Address Name Read: $0240 PTT Write: Read: $0241 PTIT Write: Read: $0242 DDRT Write: Read: $0243 RDRT Write: Read: $0244 PERT Write: Read: $0245 PPST Write: Read: $0246 Reserved Write: ...

Page 45

... Freescale Semiconductor, Inc. $0240 - $027F PIM (Port Integration Module) Address Name Bit 7 Read: PTIP7 $0259 PTIP Write: Read: $025A DDRP DDRP7 Write: Read: $025B RDRP RDRP7 Write: Read: $025C PERP PERP7 Write: Read: $025D PPSP PPSP7 Write: Read: $025E PIEP PIEP7 ...

Page 46

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0280 - $02BF Address Name Read: $0280 CAN4CTL0 Write: Read: $0281 CAN4CTL1 Write: Read: $0282 CAN4BTR0 Write: Read: $0283 CAN4BTR1 Write: Read: $0284 CAN4RFLG Write: Read: $0285 CAN4RIER Write: Read: $0286 CAN4TFLG Write: ...

Page 47

... Freescale Semiconductor, Inc. $02C0 - $02FF Reserved Address Name Bit 7 Read: 0 $02C0 - Reserved $02FF Write: $0300 - $035F Byteflight Address Name Bit 7 Read: $0300 BFMCR INITRQ MASTER ALARM Write: Read: 0 $0301 BFFSIZR Write: Read: $0302 BFTCR1 TWX0T7 TWX0T6 TWX0T5 TWX0T4 TWX0T3 TWX0T2 TWX0T1 TWX0T0 ...

Page 48

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $0300 - $035F Address Name Read: Reserved $0315 for Test Write: Read: Reserved $0316 for Test Write: Read: Reserved $0317 for Test Write: Reserved Read: $0318 for Test Write: Read: Reserved $0319 for Test ...

Page 49

... Freescale Semiconductor, Inc. $0360 - $03FF Address Name Read: $0360 - Reserved $03FF Write: 1.6 Part ID Assignments The part ID is located in two 8-bit registers PARTIDH and PARTIDL (addresses $001A and $001B after reset). The read-only value is a unique part ID for each revision of the chip. Table 1-3 shows the assigned part ID number ...

Page 50

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 51

... Freescale Semiconductor, Inc. Section 2 Signal Description This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal properties, and detailed discussion of signals built from the signal description sections of the Block User Guides of the individual IP blocks on the device. 2.1 Device Pinout The MC9S12DT128B and its derivatives are available in a 112-pin low profile quad flat pack (LQFP) and in a 80-pin quad flat pack (QFP) ...

Page 52

... KWJ0/PJ0 22 MODC/TAGHI/BKGD 23 ADDR0/DATA0/PB0 24 ADDR1/DATA1/PB1 25 ADDR2/DATA2/PB2 26 ADDR3/DATA3/PB3 27 ADDR4/DATA4/PB4 28 Figure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128B, For More Information On This Product, MC9S12DT128B, MC9S12DG128B, MC9S12DJ128B, MC9S12DB128B 112LQFP Signals shown in Bold are not available on the 80 Pin Package MC9S12DJ128B, MC9S12DB128B Go to: www.freescale.com 84 VRH 83 VDDA 82 PAD15/AN15/ETRIG1 81 PAD07/AN07/ETRIG0 ...

Page 53

... IOC5/PT5 12 IOC6/PT6 13 IOC7/PT7 14 MODC/TAGHI/BKGD 15 ADDR0/DATA0/PB0 16 ADDR1/DATA1/PB1 17 ADDR2/DATA2/PB2 18 ADDR3/DATA3/PB3 19 ADDR4/DATA4/PB4 20 Figure 2-2 Pin Assignments in 80 QFP for MC9S12DG128B, MC9S12DJ128B Bondout For More Information On This Product, MC9S12DT128B Device User Guide — V01.09 MC9S12DG128B, MC9S12DJ128B 80 QFP Go to: www.freescale.com 60 VRH 59 VDDA 58 PAD07/AN07/ETRIG0 57 PAD06/AN06 56 PAD05/AN05 55 PAD04/AN04 54 PAD03/AN03 ...

Page 54

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.2 Signal Properties Summary Table 2-1 summarizes the pin functionality. Signals shown in bold are not available in the 80 pin package. Pin Name Pin Name Pin Name Function 1 Function 2 Function 3 EXTAL — — XTAL — — ...

Page 55

... Freescale Semiconductor, Inc. Pin Name Pin Name Pin Name Function 1 Function 2 Function 3 PE1 IRQ — PE0 XIRQ — PH7 KWH7 --- PH6 KWH6 --- PH5 KWH5 --- PH4 KWH4 --- PH3 KWH3 SS1 PH2 KWH2 SCK1 PH1 KWH1 MOSI1 PH0 KWH0 MISO1 PJ7 KWJ7 TXCAN4 ...

Page 56

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Pin Name Pin Name Pin Name Function 1 Function 2 Function 3 PM3 TX_BF TXCAN1 PM2 RX_BF RXCAN1 PM1 TXCAN0 TXB PM0 RXCAN0 RXB PP7 KWP7 PWM7 PP6 KWP6 PWM6 PP5 KWP5 PWM5 PP4 KWP4 ...

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... Freescale Semiconductor, Inc. 2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL — Oscillator Pins EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived from the EXTAL input frequency. XTAL is the crystal output. 2.3.2 RESET — External Reset Pin An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up state, and an output when an internal MCU function causes a reset ...

Page 58

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.6 PAD[15] / AN1[7] / ETRIG1 — Port AD Input Pin [15] PAD15 is a general purpose input pin and analog input of the analog to digital converter ATD1. It can act as an external trigger input for the ATD1. 2.3.7 PAD[14:8] / AN1[6:0] — Port AD Input Pins [14:8] PAD14 - PAD8 are general purpose input pins and analog inputs of the analog to digital converter ATD1. 2.3.8 PAD[7] / AN0[7] / ETRIG0 — ...

Page 59

... Freescale Semiconductor, Inc. EXTAL MCU XTAL * Due to the nature of a translated ground Colpitts oscillator a DC voltage bias is applied to the crystal Please contact the crystal manufacturer for crystal DC bias conditions and recommended capacitor value C Figure 2-4 Colpitts Oscillator Connections (PE7=1) EXTAL MCU ...

Page 60

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.13 PE6 / MODB / IPIPE1 — Port E I/O Pin 6 PE6 is a general purpose input or output pin used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODB bit at the rising edge of RESET. This pin is shared with the instruction queue tracking signal IPIPE1 ...

Page 61

... Freescale Semiconductor, Inc. 2.3.21 PH6 / KWH6 — Port H I/O Pin 6 PH6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. 2.3.22 PH5 / KWH5 — Port H I/O Pin 5 PH5 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. 2.3.23 PH4 / KWH4 — ...

Page 62

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA — PORT J I/O Pin 6 PJ6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as the receive pin RXCAN for the Motorola Scalable Controller Area Network controller 4 (CAN4) or the serial data pin SDA of the IIC module. 2.3.30 PJ[1:0] / KWJ[1:0] — ...

Page 63

... Freescale Semiconductor, Inc. 2.3.36 PM4 / BF_PSYN / RXCAN0 / RXCAN4/ MOSI0 — Port M I/O Pin 4 PM4 is a general purpose input or output pin. It can be configured as the correct synchronisation pulse reception/transmission output pulse pin of Byteflight. It can be configured as the receive pin RXCAN of the Motorola Scalable Controller Area Network controllers (CAN0 or CAN4). It can be configured as the master output (during master mode) or slave input pin (during slave mode) MOSI for the Serial Peripheral Interface 0 (SPI0) ...

Page 64

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 2.3.43 PP5 / KWP5 / PWM5 — Port P I/O Pin 5 PP5 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 5 output. ...

Page 65

... Freescale Semiconductor, Inc. 2.3.51 PS5 / MOSI0 — Port S I/O Pin 5 PS5 is a general purpose input or output pin. It can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0). 2.3.52 PS4 / MISO0 — Port S I/O Pin 4 PS4 is a general purpose input or output pin. It can be configured as master input (during master mode) or slave output pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0). 2.3.53 PS3 / TXD1 — ...

Page 66

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Pin Number Nominal Mnemonic Voltage 112-pin QFP VDDR 41 VSSR 40 VDDX 107 VSSX 106 VDDA 83 VSSA 86 VRL 85 VRH 84 VDDPLL 43 VSSPLL 45 VREGEN 97 NOTE: All VSS pins must be connected together in the application. 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers External power and ground for I/O drivers ...

Page 67

... Freescale Semiconductor, Inc. 2.4.4 VDDA, VSSA — Power Supply Pins for ATD and VREG VDDA, VSSA are the power supply and ground input pins for the voltage regulator and the analog to digital converter. It also provides the reference for the internal voltage regulator. This allows the supply voltage to the ATD and the reference voltage to be bypassed independently. 2.4.5 VRH, VRL — ...

Page 68

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 69

... Freescale Semiconductor, Inc. Section 3 System Clock Description 3.1 Overview The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules. Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block User Guide for details on clock generation. ...

Page 70

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 71

... Freescale Semiconductor, Inc. Section 4 Modes of Operation 4.1 Overview Eight possible modes determine the operating configuration of the MC9S12DT128B. Each mode has an associated default memory map and external bus configuration controlled by a further pin. Three low power modes exist for the device. 4.2 Chip Configuration Summary The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during reset (Table 4-1) ...

Page 72

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table 4-3 Voltage Regulator VREGEN VREGEN 1 0 4.3 Security The device will make available a security feature preventing the unauthorized read and write of the memory contents. This feature allows: • Protection of the contents of FLASH, • ...

Page 73

... Freescale Semiconductor, Inc. 4.3.3 Unsecuring the Microcontroller In order to unsecure the microcontroller, the internal FLASH and EEPROM must be erased. This can be done through an external program in expanded mode. Once the user has erased the FLASH and EEPROM, the part can be reset into special single chip mode. ...

Page 74

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 75

... Freescale Semiconductor, Inc. Section 5 Resets and Interrupts 5.1 Overview Consult the Exception Processing section of the HCS12 Core User Guide for information on resets and interrupts. 5.2 Vectors 5.2.1 Vector Table Table 5-1 lists interrupt sources and vectors in default order of priority. Table 5-1 Interrupt Vector Locations Vector Address ...

Page 76

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 $FFCA, $FFCB Modulus Down Counter underflow $FFC8, $FFC9 Pulse Accumulator B Overflow $FFC6, $FFC7 CRG PLL lock $FFC4, $FFC5 CRG Self Clock Mode $FFC2, $FFC3 $FFC0, $FFC1 $FFBE, $FFBF $FFBC, $FFBD ...

Page 77

... Freescale Semiconductor, Inc. NOTE: For devices assembled in 80-pin QFP packages all non-bonded out pins should be configured as outputs after reset in order to avoid current drawn from floating inputs. Refer to Table 2-1 for affected pins. 5.3.2 Memory Refer to Table 1-1 for locations of the memories depending on the operating mode after reset. ...

Page 78

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 79

... Freescale Semiconductor, Inc. Section 6 HCS12 Core Block Description Consult the HCS12 Core User Guide for information about the HCS12 core modules, i.e. central processing unit (CPU), interrupt module (INT), module mapping control module (MMC), multiplexed external bus interface (MEBI), breakpoint module (BKP) and background debug mode module (BDM). ...

Page 80

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Consult the IIC Block User Guide for information about the Inter-IC Bus module. Section 11 Serial Communications Interface (SCI) Block Description There are two Serial Communications Interfaces (SCI1 and SCI0) implemented on theMC9S12DT128B device. Consult the SCI Block User Guide for information about each Serial Communications Interface module ...

Page 81

... Freescale Semiconductor, Inc. Consult the EETS2K Block User Guide for information about the EEPROM module. Section 18 RAM Block Description This module supports single-cycle misaligned word accesses without wait states. Section 19 MSCAN Block Description There are three MSCAN modules (CAN4, CAN1 and CAN0) implemented on the MC9S12DT128B. ...

Page 82

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Section 22 Printed Circuit Board Layout Proposal Table 22-1 Suggested External Component Values Component C10 / C P C11 / The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the MCU itself. The following rules must be observed: • ...

Page 83

... Freescale Semiconductor, Inc. Figure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator VSSX VDD1 C1 VSS1 VSSR VDDR For More Information On This Product, Go to: www.freescale.com MC9S12DT128B Device User Guide — V01.09 VSSA C3 VDDA VSS2 VDD2 Q1 VSSPLL VDDPLL R1 C2 ...

Page 84

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-2 Recommended PCB Layout for 80QFP Colpitts Oscillator VDD1 C1 VSS1 For More Information On This Product, VSSA VSSX VSSR VDDR Q1 VSSPLL VDDPLL R1 Go to: www.freescale.com C3 VDDA VSS2 C2 VDD2 ...

Page 85

... Freescale Semiconductor, Inc. Figure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator VSSX VDD1 C1 VSS1 VSSR VDDR VDDPLL For More Information On This Product, Go to: www.freescale.com MC9S12DT128B Device User Guide — V01.09 VSSA C3 VDDA VSS2 VDD2 VSSPLL ...

Page 86

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Figure 22-4 Recommended PCB Layout for 80QFP Pierce Oscillator VDD1 C1 VSS1 VSSR VDDR For More Information On This Product, C3 VSSA VSSX VSSPLL VSSPLL VDDPLL R1 Go to: www.freescale.com VDDA VSS2 C2 VDD2 ...

Page 87

... Freescale Semiconductor, Inc. Appendix A Electrical Characteristics A.1 General This introduction is intended to give an overview on several common topics like power supply, current injection etc. A.1.1 Parameter Classification The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate ...

Page 88

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 NOTE: In the following context VDD5 is used for either VDDA, VDDR and VDDX; VSS5 is used for either VSSA, VSSR and VSSX unless otherwise noted. IDD5 denotes the sum of the currents flowing into the VDDA, VDDX and VDDR pins ...

Page 89

... Freescale Semiconductor, Inc. A.1.5 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the device. This device contains circuitry protecting against damage due to high static voltage or electrical fields; ...

Page 90

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification ...

Page 91

... Freescale Semiconductor, Inc. calculations refer to Section A.1.8 Power Dissipation and Thermal Characteristics. Rating I/O, Regulator and Analog Supply Voltage 1 Digital Logic Supply Voltage 2 PLL Supply Voltage Voltage Difference VDDX to VDDR and VDDA Voltage Difference VSSX to VSSR and VSSA Oscillator Bus Frequency MC9S12DT128BC Operating Junction Temperature Range ...

Page 92

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01. Total Chip Power Dissipation, [W] = Package Thermal Resistance, [ C/W] JA The total power dissipation can be calculated from Chip Internal Power Dissipation, [W] INT Two cases with internal voltage regulator enabled and disabled must be considered: 1. Internal Voltage Regulator disabled ...

Page 93

... Freescale Semiconductor, Inc. Table A-5 Thermal Package Characteristics Num C Rating 1 T Thermal Resistance LQFP112, single sided PCB Thermal Resistance LQFP112, double sided PCB with 2 internal planes 3 T Junction to Board LQFP112 4 T Junction to Case LQFP112 5 T Junction to Package Top LQFP112 6 T Thermal Resistance QFP 80, single sided PCB ...

Page 94

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Input High Voltage T Input High Voltage 2 P Input Low Voltage T Input Low Voltage 3 C Input Hysteresis Input Leakage Current (pins in high ohmic input ...

Page 95

... Freescale Semiconductor, Inc. A.1.10 Supply Currents This section describes the current consumption characteristics of the device as well as the conditions for the measurements. A.1.10.1 Measurement Conditions All measurements are without output loads. Unless otherwise noted the currents are measured in single chip mode, internal voltage regulator enabled and at 25MHz bus frequency using a 4MHz oscillator in Colpitts mode ...

Page 96

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 given. A very good estimate is to take the single chip currents and add the currents due to the external loads. Table A-7 Supply Current Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating Run supply currents ...

Page 97

... Freescale Semiconductor, Inc. A.2 ATD Characteristics This section describes the characteristics of the analog to digital converter. A.2.1 ATD Operating Characteristics The Table A-8 shows conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results SSA DDA beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively be clipped ...

Page 98

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source capacitance When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external and the pin capacitance ...

Page 99

... Freescale Semiconductor, Inc. A.2.3 ATD accuracy Table A-10 specifies the ATD conversion performance excluding any errors due to current injection, input capacitance and source resistance. Table A-10 ATD Conversion Performance Conditions are shown in Table A-4 unless otherwise noted 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV ...

Page 100

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 DNL LSB V i-1 $3FF $3FE $3FD $3FC $3FB $3FA $3F9 $3F8 $3F7 $3F6 $3F5 $3F4 $3F3 Figure A-1 ATD Accuracy Definitions NOTE: Figure A-1 shows only definitions, for specification values refer to Table A-10 . ...

Page 101

... Freescale Semiconductor, Inc. A.3 NVM, Flash and EEPROM NOTE: Unless otherwise noted the abbreviation NVM (Non Volatile Memory) is used for both Flash and EEPROM. A.3.1 NVM timing The time base for all NVM program or erase operations is derived from the oscillator. A minimum oscillator frequency f is required for performing program or erase operations ...

Page 102

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.3.1.3 Sector Erase Erasing a 512 byte Flash sector byte EEPROM sector takes: The setup times can be ignored for this operation. A.3.1.4 Mass Erase Erasing a NVM block takes: The setup times can be ignored for this operation. ...

Page 103

... Freescale Semiconductor, Inc. 4. Burst Programming operations are not applicable to EEPROM 5. Minimum Erase times are achieved under maximum NVM operating frequency f 6. Minimum time, if first word in the array is not blank 7. Maximum time to complete check on an erased block A.3.2 NVM Reliability The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process monitors and burn-in to screen early life failures ...

Page 104

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 105

... Freescale Semiconductor, Inc. A.4 Voltage Regulator The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external DC load is allowed. Table A-13 Voltage Regulator Recommended Load Capacitances Rating Load Capacitance on VDD1, 2 Load Capacitance on VDDPLL For More Information On This Product, MC9S12DT128B Device User Guide — V01.09 ...

Page 106

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 107

... Freescale Semiconductor, Inc. A.5 Reset, Oscillator and PLL This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and Phase-Locked-Loop (PLL). A.5.1 Startup Table A-14 summarizes several startup characteristics explained in this section. Detailed description of the startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide. ...

Page 108

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 A.5.1.5 Pseudo Stop and Wait Recovery The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in both modes. The controller can be woken up by internal or external interrupts. After t fetching the interrupt vector ...

Page 109

... Freescale Semiconductor, Inc. A.5.3 Phase Locked Loop The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO) is also the system clock source in self clock mode. A.5.3.1 XFC Component Selection This section describes the selection of the XFC components to achieve a good filter characteristics. ...

Page 110

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 The loop bandwidth f should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10, C typical values are 50. = 0.9 ensures a good transient response. f < ------------------------------------------ C And finally the frequency relationship is defined as f VCO n = ------------ - With the above values the resistance can be calculated ...

Page 111

... Freescale Semiconductor, Inc min1 t nom t max1 The relative deviation its maximum for one clock period, and decreases towards zero for larger nom number of clock periods (N). Defining the jitter as For N < 100, the following equation is a good fit for the maximum jitter: ...

Page 112

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the effect of the jitter to a large extent. Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Self Clock Mode frequency ...

Page 113

... Freescale Semiconductor, Inc. A.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P MSCAN Wake-up dominant pulse filtered 2 P MSCAN Wake-up dominant pulse pass For More Information On This Product, MC9S12DT128B Device User Guide — V01.09 ...

Page 114

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 115

... Freescale Semiconductor, Inc. A.7 SPI A.7.1 Master Mode Figure A-5 and Figure A-6 illustrate the master mode timing. Timing values are shown in Table A-18 (OUTPUT) 2 SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT MISO 2 MSB IN (INPUT) 9 MOSI 2 MSB OUT (OUTPUT) 1.if configured as an output. 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. ...

Page 116

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01. (OUTPUT SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT) 5 MISO MSB IN (INPUT) 9 MOSI PORT DATA MASTER MSB OUT (OUTPUT) 1.If configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure A-6 SPI Master Timing (CPHA =1) ...

Page 117

... Freescale Semiconductor, Inc. A.7.2 Slave Mode Figure A-7 and Figure A-8 illustrate the slave mode timing. Timing values are shown in Table A-19. SS (INPUT) SCK (CPOL 0) (INPUT SCK (CPOL 1) (INPUT) 7 MISO SLAVE MSB OUT (OUTPUT MOSI MSB IN (INPUT) Figure A-7 SPI Slave Timing (CPHA = 0) SS ...

Page 118

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-19 SPI Slave Mode Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 200pF on all outputs Num C Rating 1 P Operating Frequency P SCK Period t = 1./f 1 sck Enable Lead Time 3 D Enable Lag Time ...

Page 119

... Freescale Semiconductor, Inc. A.8 External Bus Timing A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values shown on table Table A-20. All major bus signals are included in the diagram. While both a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle. ...

Page 120

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 ECLK PE4 5 9 Addr/Data data (read) PA, PB Addr/Data data (write) PA Non-Multiplexed Addresses PK5:0 ECS PK7 24 R/W PE2 27 LSTRB PE3 30 NOACC PE7 33 PIPO0 PIPO1, PE6,5 Figure A-9 General External Bus Timing For More Information On This Product, ...

Page 121

... Freescale Semiconductor, Inc. Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 1 P Frequency of operation (E-clock Cycle time 3 D Pulse width, E low Pulse width, E high 5 D Address delay time D Address valid time to E rise (PW ...

Page 122

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 32 D NOACC hold time 33 D IPIPO[1:0] delay time D IPIPO[1:0] valid time to E rise ( IPIPO[1:0] delay time ...

Page 123

... Freescale Semiconductor, Inc. Appendix B Package Information B.1 General This section provides the physical dimensions of the MC9S12DT128B packages. For More Information On This Product, MC9S12DT128B Device User Guide — V01.09 Go to: www.freescale.com ...

Page 124

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 B.2 112-pin LQFP package 0. PIN 1 112 IDENT 1 VIEW 0.050 C1 VIEW AB Figure 22-5 112-pin LQFP mechanical dimensions (case no. 987) For More Information On This Product, 0. TIPS ...

Page 125

... Freescale Semiconductor, Inc. B.3 80-pin QFP package 0.05 A-B 0. -C- H SEATING PLANE G DATUM -H- PLANE W X DETAIL C Figure 1 80-pin QFP Mechanical Dimensions (case no. 841B) For More Information On This Product, MC9S12DT128B Device User Guide — V01. -B- B DETAIL A 21 ...

Page 126

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 For More Information On This Product, Go to: www.freescale.com ...

Page 127

... Freescale Semiconductor, Inc. User Guide End Sheet For More Information On This Product, MC9S12DT128B Device User Guide — V01.09 Go to: www.freescale.com ...

Page 128

... Freescale Semiconductor, Inc. MC9S12DT128B Device User Guide — V01.09 Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 (800) 521-6274 480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH ...

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