MT8880 Zarlink Semiconductor, MT8880 Datasheet

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MT8880

Manufacturer Part Number
MT8880
Description
Manufacturer
Zarlink Semiconductor
Datasheet

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Features
Applications
Description
The MT8880C is a monolithic DTMF transceiver with
call progress filter. It is fabricated in Zarlink
Semiconductor’s
TONE
OSC1
OSC2
Complete DTMF transmitter/receiver
Central office quality
Low power consumption
Microprocessor port
Adjustable guard time
Automatic tone burst mode
Call progress mode
Credit card systems
Paging systems
Repeater systems/mobile radio
Interconnect dialers
Personal computers
IN+
GS
IN-
V
+
-
DD
Oscillator
Circuit
Circuit
V
Bias
Gating Cct.
Tone Burst
Ref
ISO
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Tone
Filter
Dial
V
SS
2
-CMOS
Copyright 2001-2005, Zarlink Semiconductor Inc. All Rights Reserved.
Converters
High Group
Low Group
D/A
technology,
Control
Filter
Filter
Logic
Control
Logic
Figure 1 - Functional Block Diagram
Zarlink Semiconductor Inc.
ESt
Counters
Row and
Column
and Code
Converter
Algorithm
which
Digital
Steering
Logic
St/GT
1
provides low power dissipation and high reliability. The
DTMF receiver is based upon the industry standard
MT8870 monolithic DTMF receiver; the transmitter
utilizes a switched capacitor D/A converter for low
distortion, high accuracy DTMF signalling. Internal
counters provide a burst mode such that tone bursts
can be transmitted with precise timing. A call progress
filter can be selected allowing a microprocessor to
analyze
microprocessor bus is provided and is directly
compatible with 6800 series microprocessors.
Transmit Data
Receive Data
Register
MT8880CE
MT8880CS
MT8880CN
MT8880CP
MT8880CP1
MT8880CS1
MT8880CE1
MT8880CN1
MT8880CSR
MT8880CPR
MT8880CPR1
MT8880CSR1
Register
Register
Register
Status
Control
Register
Control
A
Integrated DTMF Transceiver
B
call
Ordering Information
progress
ISO
*Pb Free Matte Tin
-40°C to +85°C
20 Pin PDIP
20 Pin SOIC
24 Pin SSOP
28 Pin PLCC
28 Pin PLCC*
20 Pin SOIC*
20 Pin PDIP*
24 Pin SSOP*
20 Pin SOIC
28 Pin PLCC
28 Pin PLCC*
20 Pin SOIC*
2
- CMOS
Buffer
Control
Interrupt
Data
Bus
Logic
tones.
I/O
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
MT8880C
A
Data Sheet
September 2005
standard
D0
D1
D2
D3
IRQ/CP
Φ2
CS
R/W
RS0

Related parts for MT8880

MT8880 Summary of contents

Page 1

... Credit card systems • Paging systems • Repeater systems/mobile radio • Interconnect dialers • Personal computers Description The MT8880C is a monolithic DTMF transceiver with call progress filter fabricated in Zarlink 2 Semiconductor’s ISO -CMOS technology, D/A ∑ TONE Converters Tone Burst Control Gating Cct ...

Page 2

... IRQ/CP pin will output a rectangular wave signal representative of the input signal applied at the input op-amp. The input signal must be within the bandwidth limits of the call progress filter. See Figure 8. 18-21 19-22 D0-D3 Microprocessor Data Bus (TTL compatible). High impedance when Φ2 is low. 14- 17 MT8880C IN VDD 2 ...

Page 3

... A standard microprocessor interface allows access to an internal status register, two control registers and two data registers. Input Configuration The input arrangement of the MT8880C provides a differential-input operational amplifier as well as a bias source (V ) which is used to bias the inputs at V Ref amp output (GS) for adjustment of gain ...

Page 4

... V c MT8880C R1 C1 IN+ IN Ref MT8880C diff) = R5/ diff (1/ωC) Figure 4 - Differential Input Configuration ), v reaches the threshold (V GTP continues to drive high as long as ESt remains high. Finally, after Zarlink Semiconductor Inc. Data Sheet ...

Page 5

... Different steering arrangements may be used to select independently the guard times for tone present (t ) and tone absent (t GTP accept and reject limits on both tone duration and interdigital pause. Guard time adjustment also allows the designer to tailor system parameters such as talk off and noise immunity. MT8880C ...

Page 6

... Figure 9 with a description of the events in Figure 11. Call Progress Filter A call progress mode, using the MT8880C, can be selected allowing the detection of various tones which identify the progress of a telephone call on the network. however, call progress tones can only be detected when CP mode has been selected. DTMF signals cannot be detected if CP mode has been selected (see Table 5). Figure 8 indicates the useful detect bandwidth of the call progress filter. Frequencies presented to the input, which are within the ‘ ...

Page 7

... DTMF Generator The DTMF transmitter employed in the MT8880C is capable of generating all sixteen standard DTMF tone pairs with low distortion and high accuracy. All frequencies are derived from an external 3.579545 MHz crystal. The sinusoidal waveforms for the individual tones are digitally synthesized using row and column programmable dividers and switched capacitor D/A converters ...

Page 8

... The divider output clocks another counter which addresses the sinewave lookup ROM. EVENTS A t REC V in ESt St/GT RX -RX DECODED TONE # (n- Read Status Register IRQ/CP MT8880C -25 0 250 500 FREQUENCY (Hz) = Reject = May Accept = Accept Figure 8 - Call Progress Response REC ID TONE # ...

Page 9

... Refer to Control Register B description for details. Distortion Calculations The MT8880C is capable of producing precise tone bursts with minimal error in frequency (see Table 1). The internal summing amplifier is followed by a first-order lowpass switched capacitor filter to minimize harmonic components and intermodulation products. The total harmonic distortion for a single tone can be calculated using ...

Page 10

... MAXIMUM ALLOWABLE DROPOUT DURING VALID DTMF SIGNAL TIME TO DETECT VALID FREQUENCIES PRESENT TIME TO DETECT VALID FREQUENCIES ABSENT GUARD TIME, TONE PRESENT. GTP t GUARD TIME, TONE ABSENT. GTA THD(%) = MT8880C Figure 11 - Description of Timing Events .... 100 V fundamental Equation 1 ...

Page 11

... Maximum Drive Level e.g. CTS Knights MP036S Toyocom TQC-203-A-9S A number of MT8880C devices can be connected as shown in Figure 12 such that only one crystal is required. Alternatively, the OSC1 inputs on all devices can be driven from a TTL buffer with the OSC2 outputs left unconnected. MT8880C 2 2 ...

Page 12

... OSC1 OSC2 Microprocessor Interface The MT8880C employs a microprocessor interface which allows precise control of transmitter and receiver functions. There are five internal registers associated with the microprocessor interface which can be subdivided into three categories, i.e., data transfer, transceiver control and transceiver status. There are two registers associated with data transfer operations ...

Page 13

... BIT NAME FUNCTION b0 TOUT TONE OUTPUT b1 CP/DTMF MODE CONTROL b2 IRQ INTERRUPT ENABLE b3 RSEL REGISTER SELECT Table 5 - Control Register A Description MT8880C IRQ CP/DTMF TOUT Table 3 - CRA Bit Positions S/D TEST BURST Table 4 - CRB Bit Positions DESCRIPTION A logic ‘1’ enables the tone output. This function can be implemented in either the burst mode or non-burst mode In DTMF mode (logic ‘ ...

Page 14

... RECEIVE DATA REGISTER FULL b3 DELAYED STEERING MT8880C DESCRIPTION A logic ‘0’ enables the burst mode. When this mode is selected, data corresponding to the desired DTMF tone pair can be written to the Transmit Register resulting in a tone burst of a specific duration (see AC Characteristics). Subsequently, a pause of the same duration is induced ...

Page 15

... R/W RS0 CS * Microprocessor based systems can inject undesirable noise into the supply rails. The performance of the MT8880 can be optimized by keeping noise on the supply rails to a minimum. The decoupling capacitor (C3) should be connected close to the device and ground loops should be avoided. 15 Zarlink Semiconductor Inc. ...

Page 16

... MMD7000 (or equivalent) Test load for D0-D3 pins 6802 IRQ Address Peripheral decode VMA R/W E Data Figure 15 - MT8880C to 6802 Interface MT8880C TEST POINT Test load for IRQ/CP pin Figure 14 - Test Circuit +5 V 3.3k 16 Zarlink Semiconductor Inc. Data Sheet 5.0 VDC 3 kΩ ...

Page 17

... Read the Receive Data Register Write to Transmit Data Register NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms ( WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms ( MT8880C Control CS RS0 R/W ...

Page 18

... Ref 11 V output resistance Ref 12 D Low level input voltage High level input voltage Input leakage current a l MT8880C Symbol Voltages are with respect to ground ( unless otherwise stated. ‡ Sym. Min. Typ ...

Page 19

... Allowable resistive load (GS) 11 Common mode range Figures are for design aid only: not guaranteed and not subject to production testing. Characteristics are over recommended operating conditions unless otherwise stated. MT8880C AC Electrical Characteristics Characteristics Valid Input signal levels R 1 (each tone of composite ...

Page 20

... Delay Delay - Tone burst duration 10 Tone pause duration Tone burst duration (extended) 12 Tone pause duration (extended) MT8880C ) unless otherwise stated ‡ Sym. Min. Typ. Max ±1.5%±2Hz ±3.5% -16 -12 22 Voltages are with respect to ground (V ‡ ...

Page 21

... The precise dial tone frequencies are 350 and 440 For an error rate of less than 1 in 10,000. 10) Referenced to the lowest amplitude tone in the DTMF signal. 11) Referenced to the minimum valid accept level. 12) For guard time calculation purposes. MT8880C ) unless otherwise stated. SS Sym. Min. ...

Page 22

... R Φ2 Φ RS0 RWS R/W DATA BUS MT8880C t CYC Figure 17 - Φ2 Pulse t DDR t RWH t DHR Valid Data Figure 18 - MPU Read Cycle 22 Zarlink Semiconductor Inc. Data Sheet t AH ...

Page 23

... AS CS RS0 t RWS R/W DATA BUS MT8880C RWH t t DSW DHW Valid Data Figure 19 - MPU Write Cycle 23 Zarlink Semiconductor Inc. Data Sheet ...

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Page 28

... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...

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