NMC27C64Q Fairchild Semiconductor, NMC27C64Q Datasheet
NMC27C64Q
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NMC27C64Q Summary of contents
Page 1
... The CMOS design allows the part to operate over extended and military temperature ranges. The NMC27C64Q is packaged in a 28-pin dual-in-line package with a quartz window. The quartz window allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written electrically into the device by following the programming procedure ...
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... GND GND GND Note: Socket compatible EPROM pin configurations are shown in the blocks adjacent to the NMC27C64 pins. Pin Names Commercial Temperature Range Parameter/Order Number NMC27C64Q, N 150 NMC27C64Q, N 200 Extended Temp Range (- +85 C) Parameter/Order Number NMC27C64QE, NE200 NMC27C64 Rev. C 27C16 NMC27C64 ...
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... NMC27C64 Rev. C Power Dissipation (Note 1) Lead Temperature - +125 C (Soldering, 10 sec.) - +150 C ESD Rating (Mil Spec 883C, +6.5V to -0.6V Method 3015.2) Operating Conditions +1.0V to GND -0.6V CC Temperature Range NMC27C64Q 150, 200 NMC27C64N 150, 200 +14.0V to -0.6V NMC27C64QE 200 NMC27C64NE 200 +7.0V to -0.6V V Power Supply CC Conditions GND IN CC ...
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... Capacitance TA = +25˚ MHz (Note 2) NMC27C64Q Symbol Parameter C Input Capacitance IN C Output Capacitance OUT Capacitance TA = +25˚ MHz (Note 2) NMC27C64N Symbol Parameter C Input Capacitance IN C Output Capacitance OUT AC Test Conditions Output Load 1 TTL Gate and C Input Rise and Fall Times ...
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Programming Characteristics Symbol Parameter t Address Setup Time Setup Time OES t CE Setup Time CES t Data Setup Time Setup Time VPS Setup Time VCS CC t Address Hold Time ...
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Programming Waveforms 2V ADDRESS 0.8V 2V DATA 0.8V 6. 13. 0. 0.8V PGM 2V OE 0.8V Note 11: Fairchild’s standard product warranty applies to devices programmed to specifications described herein. Note 12: V must ...
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Fast Programming Algorithm Flow Chart Increment ADDR NMC27C64 Rev. C Start ADDR = First Location 12.75V Program one 100 s Pulse Increment X Yes ...
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... A low level TTL pulse applied to the PGM input programs the paralleled NMC27C64s application requires erasing and reprogramming, the NMC27C64Q UV erasable PROM in a win- dowed package should be used. TABLE 1. Mode Selection ...
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Functional Description Program Inhibit Programming multiple NMC27C64s in parallel with different data is also easily accomplished. Except for CE all like inputs (including OE and PGM) of the parallel NMC27C64 may be common. A TTL low level program pulse applied ...
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... MAX 0.180 (4.59) MAX 0.090-0.110 0.015-0.021 0.060-0.100 (2.29 - 2.80) (0.38 - 0.53) (1.53 - 2.55) TYP TYP TYP Dual-In-Line Package (Q) Order Number NMC27C64Q Package Number J28AQ 0.062 RAD 0.510 0.005 (1.575) (12.95 0.127) 0.008-0.015 Pin # (0.229-0.381) IDENT +0 ...