PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


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Page 114/202:

Specifications for pulse width specifications

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PIC16F688
11.2
Reset
The PIC16F688 differentiates between various kinds of
Reset:
a)
Power-on Reset (POR)
b)
WDT Reset during normal operation
c)
WDT Reset during Sleep
d)
MCLR Reset during normal operation
e)
MCLR Reset during Sleep
f)
Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 11-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR/V
pin
PP
Sleep
WDT
WDT
Module
Time-out
Reset
V
Rise
DD
Detect
Power-on Reset
V
DD
(1)
Brown-out
Reset
BOREN
SBOREN
OST/PWRT
OST
10-bit Ripple Counter
OSC1/
CLKI pin
PWRT
11-bit Ripple Counter
LFINTOSC
Note 1:
Refer to the Configuration Word register (Register 11-1).
DS41203D-page 112
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 11-2. These bits are
used in software to determine the nature of the Reset.
See Table 11-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 11-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 14.0 “Electrical
Specifications” for pulse width specifications.
S
R
Enable PWRT
Enable OST
© 2007 Microchip Technology Inc.
Chip_Reset
Q