PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


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PIC16F688
FIGURE 3-9:
FSCM TIMING DIAGRAM
Sample Clock
System
Clock
Output
Clock Monitor Output
(Q)
OSCFIF
Note:
The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in
this example have been chosen for clarity.
TABLE 3-2:
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
Name
Bit 7
Bit 6
Bit 5
(2)
CONFIG
CPD
CP
MCLRE
INTCON
GIE
PEIE
T0IE
OSCCON
IRCF2
IRCF1
OSCTUNE
PIE1
EEIE
ADIE
RCIE
PIR1
EEIF
ADIF
RCIF
Legend:
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
Note 1:
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
2:
See Configuration Word register (CONFIG) for operation of all register bits.
DS41203D-page 32
Oscillator
Failure
Test
Test
Bit 4
Bit 3
Bit 2
Bit 1
PWRTE
WDTE
FOSC2
FOSC1
INTE
RAIE
T0IF
INTF
IRCF0
OSTS
HTS
LTS
TUN4
TUN3
TUN2
TUN1
C2IE
C1IE
OSFIE
TXIE
C2IF
C1IF
OSFIF
TXIF
Failure
Detected
Test
Value on
Value on
Bit 0
all other
POR, BOR
(1)
Resets
FOSC0
RAIF
0000 000x
0000 000x
SCS
-110 x000
-110 x000
TUN0
---0 0000
---u uuuu
0000 0000
0000 0000
TMR1IE
0000 0000
0000 0000
TMR1IF
© 2007 Microchip Technology Inc.