PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


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REGISTER 4-4:
WPUA: WEAK PULL-UP PORTA REGISTER
U-0
U-0
R/W-1
WPUA5
bit 7
Legend:
R = Readable bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
bit 7-6
Unimplemented: Read as ‘0’
bit 5-4
WPUA<5:4>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
WPUA<2:0>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Note 1:
Global RAPU must be enabled for individual pull-ups to be enabled.
2:
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISA = 0).
3:
The RA3 pull-up is enabled when configured as MCLR and disabled as an I/O in the Configuration Word.
4:
WPUA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
REGISTER 4-5:
IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
U-0
U-0
R/W-0
IOCA5
bit 7
Legend:
R = Readable bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
bit 7-6
Unimplemented: Read as ‘0’
bit 5-0
IOCA<5:0>: Interrupt-on-change PORTA Control bits
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Note 1:
Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
2:
IOCA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
© 2007 Microchip Technology Inc.
R/W-1
U-0
R/W-1
WPUA4
WPUA2
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
IOCA4
IOCA3
IOCA2
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC16F688
R/W-1
R/W-1
WPUA1
WPUA0
bit 0
x = Bit is unknown
R/W-0
R/W-0
IOCA1
IOCA0
bit 0
x = Bit is unknown
DS41203C-page 35