PIC16F688

Manufacturer Part NumberPIC16F688
ManufacturerMicrochip Technology Inc.
PIC16F688 datasheet
 


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Page 69/202

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TABLE 8-1:
ADC CLOCK PERIOD (T
ADC Clock Period (T
)
AD
ADC Clock Source
ADCS<2:0>
F
/2
000
OSC
F
/4
100
OSC
F
/8
001
OSC
F
/16
101
OSC
F
/32
OSC
010
F
/64
OSC
110
F
x11
RC
Legend: Shaded cells are outside of recommended range.
Note 1:
The F
source has a typical T
RC
2:
These values violate the minimum required T
3:
For faster conversion times, the selection of another clock source is recommended.
4:
When the device frequency is greater than 1 MHz, the F
conversion will be performed during Sleep.
FIGURE 8-2:
ANALOG-TO-DIGITAL CONVERSION T
T
to T
T
1 T
2 T
CY
AD
AD
AD
AD
b9
b8
Conversion Starts
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
Set GO/DONE bit
© 2007 Microchip Technology Inc.
) V
. DEVICE OPERATING FREQUENCIES (VDD > 3.0V)
AD
S
Device Frequency (F
20 MHz
8 MHz
(2)
(2)
100 ns
250 ns
(2)
(2)
200 ns
500 ns
(2)
1.0 μs
(2)
400 ns
(2)
2.0 μs
800 ns
1.6 μs
4.0 μs
3.2 μs
8.0 μs
(3)
2-6 μs
(1,4)
2-6 μs
(1,4)
time of 4 μs for V
> 3.0V.
AD
DD
time.
AD
clock source is only recommended if the
RC
CYCLES
AD
3 T
4 T
5 T
6 T
7 T
8 T
AD
AD
AD
AD
AD
AD
b7
b6
b5
b4
b3
ADRESH and ADRESL registers are loaded,
GO bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
PIC16F688
)
OSC
4 MHz
1 MHz
(2)
2.0 μs
500 ns
1.0 μs
(2)
4.0 μs
2.0 μs
8.0 μs
(3)
(3)
4.0 μs
16.0 μs
(3)
(3)
8.0 μs
32.0 μs
16.0 μs
(3)
64.0 μs
(3)
2-6 μs
(1,4)
2-6 μs
(1,4)
9
T
10 T
11
AD
AD
b2
b1
b0
DS41203D-page 67