PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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PIC16F87/88
11.2.3
SETTING UP 9-BIT MODE WITH
ADDRESS DETECT
When setting up an asynchronous reception with
address detect enabled:
• Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit BRGH.
• Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
• If interrupts are desired, then set enable bit RCIE.
• Set bit RX9 to enable 9-bit reception.
• Set ADDEN to enable address detect.
• Enable the reception by setting enable bit CREN.
FIGURE 11-6:
AUSART RECEIVE BLOCK DIAGRAM
x64 Baud Rate CLK
F
OSC
SPBRG
Baud Rate Generator
RB2/SDO/RX/DT
Pin Buffer
and Control
SPEN
RX9
ADDEN
RX9
ADDEN
RSR<8>
DS30487C-page 106
• Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE was set.
• Read the RCSTA register to get the ninth bit and
determine if any error occurred during reception.
• Read the 8-bit received data by reading the
RCREG register to determine if the device is
being addressed.
• If any error occurred, clear the error by clearing
enable bit CREN.
• If the device has been addressed, clear the
ADDEN bit to allow data bytes and address bytes
to be read into the receive buffer and interrupt the
CPU.
OERR
CREN
64
RSR Register
MSb
or
16
7
Stop
(8)
Data
RX9
Recovery
Enable
Load of
Receive
Buffer
RX9D
RCREG Register
8
RCIF
Interrupt
RCIE
 2005 Microchip Technology Inc.
FERR
LSb
0
1
Start
8
8
FIFO
Data Bus