PIC16F88

Manufacturer Part NumberPIC16F88
ManufacturerMicrochip Technology Inc.
PIC16F88 datasheet
 
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Page 135/228:

Power-up Timer (PWRT)

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15.3
MCLR
PIC16F87/88 devices have a noise filter in the MCLR
Reset path. The filter will detect and ignore small
pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
The behavior of the ESD protection on the MCLR pin
has been altered from previous devices of this family.
Voltages applied to the pin that exceed its specification
can result in both MCLR and excessive current beyond
the device specification during the ESD event. The
circuit, as shown in Figure 15-2, is suggested.
Note:
For this reason, Microchip recommends
that the MCLR pin no longer be tied
directly to V
.
DD
The RA5/MCLR/V
pin can be configured for MCLR
PP
(default), or as an I/O pin (RA5). This is configured
through the MCLRE bit in Configuration Word 1.
FIGURE 15-2:
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
POWER-UP)
DD
V
DD
D
R
R1
MCLR
PIC16F87/88
C
Note 1: External Power-on Reset circuit is required
only if the V
power-up slope is too slow.
DD
The diode D helps discharge the capacitor
quickly when V
powers down.
DD
2: R < 40 k is recommended to make sure that
the voltage drop across R does not violate
the device’s electrical specification.
3: R1 = 1 k to 10 k will limit any current flow-
ing into MCLR from external capacitor C
(0.1 F), in the event of RA5/MCLR/V
breakdown due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS).
15.4
Power-on Reset (POR)
A Power-on Reset pulse is generated on-chip when
V
rise is detected (in the range of 1.2V-1.7V). To take
DD
advantage of the POR, tie the MCLR pin to V
described in Section 15.3 “MCLR”. A maximum rise
time for V
is specified. See Section 18.0 “Electrical
DD
Characteristics” for details.
 2005 Microchip Technology Inc.
When the device starts normal operation (exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the device
must be held in Reset until the operating conditions are
met. For more information, see Application Note,
AN607 “Power-up Trouble Shooting” (DS00607).
15.5

Power-up Timer (PWRT)

The Power-up Timer (PWRT) of the PIC16F87/88 is a
counter that uses the INTRC oscillator as the clock
input. This yields a count of 72 ms. While the PWRT is
counting, the device is held in Reset.
The power-up time delay depends on the INTRC and
will vary from chip-to-chip due to temperature and
process variation. See DC parameter #33 for details.
The PWRT is enabled by clearing configuration bit
PWRTEN.
15.6
Oscillator Start-up Timer (OST)
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over (if enabled). This helps to ensure
that the crystal oscillator or resonator has started and
stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
Sleep.
15.7
Brown-out Reset (BOR)
The configuration bit, BOREN, can enable or disable
the Brown-out Reset circuit. If V
(parameter D005, about 4V) for longer than T
(parameter #35, about 100 s), the brown-out situation
will reset the device. If V
than T
, a Reset may not occur.
BOR
Once the brown-out occurs, the device will remain in
Brown-out Reset until V
pin
Power-up Timer (if enabled) will keep the device in
PP
Reset for T
(parameter #33, about 72 ms). If V
PWRT
should fall below V
BOR
Reset process will restart when V
with the Power-up Timer Reset. Unlike previous PIC16
devices, the PWRT is no longer automatically enabled
when the Brown-out Reset circuit is enabled. The
PWRTEN
and
BOREN
, as
DD
independent of each other.
PIC16F87/88
falls below V
DD
BOR
BOR
falls below V
for less
DD
BOR
rises above V
. The
DD
BOR
DD
during T
, the Brown-out
PWRT
rises above V
DD
BOR
configuration
bits
are
DS30487C-page 133